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| author | Vaibhav Jain <vaibhav@linux.vnet.ibm.com> | 2018-01-31 12:22:28 +0530 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2018-02-13 01:30:10 -0600 |
| commit | 328af10e1c113449198373fa5d9dbbf1b66ddd7e (patch) | |
| tree | 3a5635ea18bfb41fa7f065fed045f5f1cfd26cbd /hw/phb4.c | |
| parent | 55c13bd1231a51e0109eeadc17cbbf46fa649f02 (diff) | |
| download | talos-skiboot-328af10e1c113449198373fa5d9dbbf1b66ddd7e.tar.gz talos-skiboot-328af10e1c113449198373fa5d9dbbf1b66ddd7e.zip | |
capi: Enable channel tag streaming for PHB in CAPP mode
We re-enable channel tag streaming for PHB in CAPP mode as without it
PEC was waiting for cresp for each DMA write command before sending a
new DMA write command on the Powerbus. This resulted in much lower DMA
write performance than expected.
The patch updates enable_capi_mode() to remove the masking of
channel_streaming_en bit in PBCQ Hardware Configuration Register. Also
does some re-factoring of the code that updates this register to use
xscom_write_mask instead of xscom_read followed by a xscom_write.
Cc: stable
Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Christophe Lombard clombard@linux.vnet.ibm.com
Acked-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'hw/phb4.c')
| -rw-r--r-- | hw/phb4.c | 12 |
1 files changed, 4 insertions, 8 deletions
@@ -3796,14 +3796,10 @@ static int64_t enable_capi_mode(struct phb4 *p, uint64_t pe_number, reg |= dma_eng; xscom_write(p->chip_id, p->pe_xscom + XPEC_NEST_CAPP_CNTL, reg); - /* PCI to PB data movement ignores the PB init signal. - * Disable streaming. - */ - xscom_read(p->chip_id, p->pe_xscom + XPEC_NEST_PBCQ_HW_CONFIG, ®); - reg |= XPEC_NEST_PBCQ_HW_CONFIG_PBINIT; - if (p->index == CAPP0_PHB_INDEX) - reg &= ~XPEC_NEST_PBCQ_HW_CONFIG_CH_STR; - xscom_write(p->chip_id, p->pe_xscom + XPEC_NEST_PBCQ_HW_CONFIG, reg); + /* PCI to PB data movement ignores the PB init signal. */ + xscom_write_mask(p->chip_id, p->pe_xscom + XPEC_NEST_PBCQ_HW_CONFIG, + XPEC_NEST_PBCQ_HW_CONFIG_PBINIT, + XPEC_NEST_PBCQ_HW_CONFIG_PBINIT); /* PEC Phase 4 (PHB) registers adjustment * Inbound CAPP traffic: The CAPI can send both CAPP packets and |
