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authorOliver O'Halloran <oohall@gmail.com>2019-03-18 17:10:58 +1100
committerStewart Smith <stewart@linux.ibm.com>2019-03-28 15:24:12 +1100
commit84aa25921a09c7c6b703cf56a9396e2d55d49223 (patch)
tree5f05d19611935df14403d858163f3bf12b862f60 /core
parent1ef5a64b85d56abecf82b63356e7ef9303c6a9a0 (diff)
downloadtalos-skiboot-84aa25921a09c7c6b703cf56a9396e2d55d49223.tar.gz
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core/pcie-slot: Don't bail early in the power on case
Exiting early in the power off case makes sense since we can't disable slot power (or assert PERST) for suprise hotplug slots. However, we should not exit early in the power-on case since it's possible slot power may have been disabled (or just not enabled at boot time). Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'core')
-rw-r--r--core/pcie-slot.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/core/pcie-slot.c b/core/pcie-slot.c
index 8696129f..e7013d1e 100644
--- a/core/pcie-slot.c
+++ b/core/pcie-slot.c
@@ -234,10 +234,11 @@ static int64_t pcie_slot_set_power_state_ext(struct pci_slot *slot, uint8_t val,
if (val == PCI_SLOT_POWER_OFF)
return OPAL_SUCCESS;
- if (!pci_slot_has_flags(slot, PCI_SLOT_FLAG_FORCE_POWERON)) {
- pci_slot_set_state(slot, PCI_SLOT_STATE_SPOWER_DONE);
- return OPAL_ASYNC_COMPLETION;
- }
+ /*
+ * Some systems have the slot power disabled by default
+ * so we always perform the power-on step. This is not
+ * *strictly* required, but it's probably a good idea.
+ */
}
pci_slot_set_state(slot, PCI_SLOT_STATE_SPOWER_START);
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