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| author | Nicholas Piggin <npiggin@gmail.com> | 2017-10-24 21:40:59 +1000 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-10-29 18:48:02 -0500 |
| commit | 90583f437bd6f82e47fac1616c4cab1e0ad84d6c (patch) | |
| tree | 68cad6b8157015df945e9428813ba6f7f847450a /asm | |
| parent | 7c154282947575d7478a3cda069095e4fbd7a632 (diff) | |
| download | talos-skiboot-90583f437bd6f82e47fac1616c4cab1e0ad84d6c.tar.gz talos-skiboot-90583f437bd6f82e47fac1616c4cab1e0ad84d6c.zip | |
asm/head: initialize preferred DSCR value
POWER7/8 use DSCR=0. POWER9 preferred value has "stride-N" enabled.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'asm')
| -rw-r--r-- | asm/head.S | 22 |
1 files changed, 19 insertions, 3 deletions
@@ -782,7 +782,7 @@ init_replicated_sprs: cmpwi cr0,%r3,PVR_TYPE_P8NVL beq 3f cmpwi cr0,%r3,PVR_TYPE_P9 - beq 3f + beq 4f /* Unsupported CPU type... what do we do ? */ b 9f @@ -792,14 +792,30 @@ init_replicated_sprs: mtspr SPR_LPCR, %r3 sync isync - b 9f + LOAD_IMM64(%r3,0x0) + mtspr SPR_DSCR,%r3 + b 9f + +3: /* P8, P8E */ + /* LPCR: sane value */ + LOAD_IMM64(%r3,0x0040000000000000) + mtspr SPR_LPCR, %r3 + sync + isync + LOAD_IMM64(%r3,0x0) + mtspr SPR_DSCR,%r3 + b 9f -3: /* P8, P8E, P9 */ +4: /* P9 */ /* LPCR: sane value */ LOAD_IMM64(%r3,0x0040000000000000) mtspr SPR_LPCR, %r3 sync isync + /* DSCR: Stride-N Stream Enable */ + LOAD_IMM64(%r3,0x0000000000000010) + mtspr SPR_DSCR,%r3 + 9: blr .global enter_nap |
