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authorMichael Neuling <mikey@neuling.org>2016-05-02 15:26:21 +1000
committerStewart Smith <stewart@linux.vnet.ibm.com>2016-05-10 16:04:51 +1000
commit591feeef8353c8a0ee73e42ff1538cf436c5fd1d (patch)
tree224bfb9fbed30b06eede81bd82d0506d91f24bb3 /asm
parent3ff350343a67cd1897f37684613468a5f849ac1b (diff)
downloadtalos-skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.tar.gz
talos-skiboot-591feeef8353c8a0ee73e42ff1538cf436c5fd1d.zip
Add base POWER9 support
Add PVR detection, chip id and other misc bits for POWER9. POWER9 changes the location of the HILE and attn enable bits in the HID0 register, so add these definitions also. Signed-off-by: Michael Neuling <mikey@neuling.org> [stewart@linux.vnet.ibm.com: Fix Numbus typo, hdata_to_dt build fixes] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'asm')
-rw-r--r--asm/head.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/asm/head.S b/asm/head.S
index 5335846f..5255d7d1 100644
--- a/asm/head.S
+++ b/asm/head.S
@@ -259,6 +259,8 @@ boot_entry:
beq 2f
cmpwi cr0,%r3,PVR_TYPE_P8NVL
beq 2f
+ cmpwi cr0,%r3,PVR_TYPE_P9
+ beq 1f
attn /* Unsupported CPU type... what do we do ? */
/* P8 -> 8 threads */
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