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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-03-09 11:45:39 +1100 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-03-09 13:36:35 +1100 |
| commit | 55b280a836af0632e942e21272ab4405bba938b8 (patch) | |
| tree | a2c7b3127777c454df160069db3df14bd9dea3d5 /asm | |
| parent | 403b82555425a71121f7a62e58d37f57325f78d1 (diff) | |
| download | talos-skiboot-55b280a836af0632e942e21272ab4405bba938b8.tar.gz talos-skiboot-55b280a836af0632e942e21272ab4405bba938b8.zip | |
asm: Don't try to set LPCR:LPES1 on P8 and P9
The bit doesn't exist
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'asm')
| -rw-r--r-- | asm/head.S | 30 |
1 files changed, 28 insertions, 2 deletions
@@ -722,12 +722,38 @@ init_shared_sprs: .global init_replicated_sprs init_replicated_sprs: + mfspr %r3,SPR_PVR + srdi %r3,%r3,16 + cmpwi cr0,%r3,PVR_TYPE_P7 + beq 1f + cmpwi cr0,%r3,PVR_TYPE_P7P + beq 1f + cmpwi cr0,%r3,PVR_TYPE_P8E + beq 3f + cmpwi cr0,%r3,PVR_TYPE_P8 + beq 3f + cmpwi cr0,%r3,PVR_TYPE_P8NVL + beq 3f + cmpwi cr0,%r3,PVR_TYPE_P9 + beq 3f + /* Unsupported CPU type... what do we do ? */ + b 9f + +1: /* P7, P7+ */ /* LPCR: sane value */ LOAD_IMM64(%r3,0x0040000000000004) mtspr SPR_LPCR, %r3 + sync + isync + b 9f - /* XXX TODO: Add more */ - blr +3: /* P8, P8E, P9 */ + /* LPCR: sane value */ + LOAD_IMM64(%r3,0x0040000000000000) + mtspr SPR_LPCR, %r3 + sync + isync +9: blr .global enter_nap enter_nap: |
