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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2017-12-12 16:22:55 +1100 |
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committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2017-12-11 23:31:45 -0600 |
commit | 84febad7c5f947d744ef656f4b478d8b1df51471 (patch) | |
tree | 05b0663f82a0103e7e72345b12fdc341784f03db | |
parent | 1e00d546ca29d5eb9c51558250aa37facf8f2afb (diff) | |
download | talos-skiboot-84febad7c5f947d744ef656f4b478d8b1df51471.tar.gz talos-skiboot-84febad7c5f947d744ef656f4b478d8b1df51471.zip |
xive: Ensure VC informational FIRs are masked
Some HostBoot versions leave those as checkstop, they are harmless
and can sometimes occur during normal operations.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
-rw-r--r-- | hw/xive.c | 5 | ||||
-rw-r--r-- | include/xive.h | 6 |
2 files changed, 11 insertions, 0 deletions
@@ -1770,6 +1770,11 @@ static bool xive_config_init(struct xive *x) val |= VC_EQC_CONF_ENABLE_END_u_BIT; xive_regw(x, VC_EQC_CONFIG, val); + /* Disable error reporting in the FIR for info errors + * from the VC. + */ + xive_regw(x, CQ_FIRMASK_OR, 3ull); + return true; } diff --git a/include/xive.h b/include/xive.h index 28807200..5262cb48 100644 --- a/include/xive.h +++ b/include/xive.h @@ -70,6 +70,12 @@ #define CQ_AIB_CTL 0x110 #define X_CQ_RST_CTL 0x23 #define CQ_RST_CTL 0x118 +#define X_CQ_FIRMASK 0x33 +#define CQ_FIRMASK 0x198 +#define X_CQ_FIRMASK_AND 0x34 +#define CQ_FIRMASK_AND 0x1a0 +#define X_CQ_FIRMASK_OR 0x35 +#define CQ_FIRMASK_OR 0x1a8 /* PC LBS1 register offsets */ #define X_PC_TCTXT_CFG 0x100 |