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path: root/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C
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* SMF: clear HRMOR[15] in all modes so that secure mode won't hang coreGreg Still2018-10-051-5/+7
* Use core target for HRMOR/URMOR scoms in p9_sbe_load_bootloaderDean Sanner2018-08-291-2/+2
* SMF: SBE updates for SMF (URMOR set and CPMMR[Runtime Wakeup Mode] clear)Greg Still2018-08-291-7/+27
* p9_sbe_scominit -- set XSCOM BAR in secure memory with SMF enabledJoe McGill2018-07-181-0/+16
* Revert changes to EFF_FBC_GRP_CHIP_IDS modespashabk-in2018-04-201-1/+1
* Consume PROC_MEM_TO_USE for alt memory configspashabk-in2018-04-161-2/+2
* Pass SBE Security Backdoor Bit to HB BootloaderIlya Smirnov2018-04-021-2/+2
* Chip address extension workaround for HW423589 (option2), part1Joe McGill2017-12-011-7/+8
* Prime PSSCR reg on thread 1 so istep 16 works in SMT1Dean Sanner2017-09-191-0/+5
* Update p9_sbe_load_bootloader Hwp to receive the addr-key stash-2Raja Das2017-08-111-1/+23
* L3 update -- p9_sbe_load_bootloaderJoe McGill2017-08-071-297/+515
* chip XOR swap -- use absolute fabric group ID to form bootloader load addressJoe McGill2017-07-191-1/+1
* Have SBE set PSSCR in fused core modeDean Sanner2017-07-171-7/+18
* Support for fused core modeSachin Gupta2017-07-111-16/+48
* Fix alignment issues in SBE-HB structureDan Crowell2017-06-131-6/+11
* Check Scratch Register 3 bit 7 and set new ATTR_SECURE_SETTINGSMike Baiocchi2017-06-071-6/+9
* support chip swap in memory map via FBC XOR mask programmingJoe McGill2017-05-271-19/+51
* Add Secure Access Bit to Bootloader Config DataStephen Cprek2017-03-141-2/+13
* Changing ttype to dma for MPIPL runsCHRISTINA L. GRAVES2017-01-221-2/+13
* Change auto variables to referencesspashabk-in2016-11-221-1/+1
* Update file headersSachin Gupta2016-09-161-1/+1
* SBE move import`Shakeeb2016-09-011-0/+327
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