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path: root/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C
Commit message (Expand)AuthorAgeFilesLines
* PM Level 3 for multiple proceduresAmit Kumar2017-09-201-2/+0
* Istep4: procedures upgrade to level3Yue Du2017-07-201-13/+26
* Istep4: clean up istep4 todo items and mark them with RTCYue Du2017-01-311-11/+4
* p9_hcd_cache_chiplet_reset skip entire vcs workaround in simBen Gass2016-12-201-99/+95
* Change auto variables to referencesspashabk-in2016-11-221-1/+1
* Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setupYue Du2016-11-211-0/+3
* Skip flushing entire eq ring to 1's in sim p9_hcd_cache_chiplet_resetBen Gass2016-10-211-2/+28
* Lab: DD1 VCS workaround fixYue Du2016-10-141-29/+44
* HW388878 VCS workaroundJoe McGill2016-10-121-1/+1
* Cache HWP: DD1 VCS WorkaroundYue Du2016-10-111-0/+173
* Update file headersSachin Gupta2016-09-161-1/+1
* SBE move import`Shakeeb2016-09-011-0/+237
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