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* p9_block_wakeup_intr Level 1Bilicon Patil2016-05-131-0/+107
* invoke cache SCOM initfilesJoe McGill2016-05-111-1/+40
* Pervasive_attribute.xml with ATTR_SDISN_SETUPAnusha Reddy Rangareddygari2016-05-111-0/+1
* Enable p9_block_wakeup_intrSachin Gupta2016-05-092-0/+2
* p9_block_wakeup_intr Level 2Greg Still2016-05-092-14/+32
* Move array of OP_TYPE strings from .H to .Ccrgeddes2016-05-091-8/+1
* Fix all incorrect copyright prologsStephen Cprek2016-05-091-1/+0
* p9_block_wakeup_intr Level 1Bilicon Patil2016-05-092-0/+126
* HWP's for p9_perv_sbe_cmn,p9_sbe_arrayinit,p9_sbe_tp_arrayinitAnusha Reddy Rangareddygari2016-05-098-93/+183
* Level 2 HWP for p9_sbe_chiplet_resetAnusha Reddy Rangareddygari2016-05-091-6/+6
* Infrastructure updates to build cache initfile HWPs in import treeJoe McGill2016-05-062-0/+49
* change epsilon attribute definitions from arrays to scalarsJoe McGill2016-05-064-54/+150
* IPL optimized codesAnusha Reddy Rangareddygari2016-05-058-946/+558
* Level 2 HWP for p9_sbe_chiplet_pll_setupAnusha Reddy Rangareddygari2016-05-051-56/+141
* Changing error messages to save SBE spaceCHRISTINA L. GRAVES2016-05-051-33/+2
* add core/cache initfilesJoe McGill2016-05-046-0/+757
* Level 2 HWP for p9_sbe_nest_startclocksAnusha Reddy Rangareddygari2016-05-041-40/+40
* Level 2 HWP for p9_sbe_tp_chiplet_init3Anusha Reddy Rangareddygari2016-05-041-9/+10
* Single SEEPROM image for SBESachin Gupta2016-05-032-0/+2
* Remove <writable/> from ATTR_POUNDV_BUCKET_DATAcrgeddes2016-05-031-1/+3
* Fixing PBARBUFVAL and PBAWBUFVAL to fix error that Raja found in simicsCHRISTINA L. GRAVES2016-05-031-35/+37
* L2 - p9_build_smp HWPsThi Tran2016-05-021-10/+28
* Fix all incorrect copyright prologsStephen Cprek2016-05-022-2/+2
* p9_adu_access and p9_adu_setup L2 proceduresCHRISTINA L. GRAVES2016-05-022-0/+210
* p9_adu_access and p9_adu_setup L2 proceduresCHRISTINA L. GRAVES2016-05-021-0/+62
* Fix for run_ipl for JoshCHRISTINA L. GRAVES2016-05-021-10/+0
* L2 - p9_build_smp HWPsThi Tran2016-05-022-36/+579
* Fix all incorrect copyright prologsStephen Cprek2016-05-023-3/+3
* p9_adu_access and p9_adu_setup L2 proceduresCHRISTINA L. GRAVES2016-05-024-0/+433
* Fix ATTR_CLOCK_PLL_MUXDan Crowell2016-04-281-0/+1
* Get PoundV Bucket function and associated attributescrgeddes2016-04-281-0/+43
* L2 - Fabric updates for multi-chip supportJoe McGill2016-04-254-167/+177
* Level 2 HWP for p9_sbe_tp_chiplet_init3Anusha Reddy Rangareddygari2016-04-251-17/+18
* Level 2 HWP for p9_sbe_chiplet_resetAnusha Reddy Rangareddygari2016-04-252-5/+53
* p9_setup_evid L2 commitSudheendra K Srivathsa2016-04-252-0/+62
* HWP-CACHE/CORE:istep4 procedures updatesYue Du2016-04-2529-784/+1335
* Level 2 HWP for p9_sbe_arrayinitAnusha Reddy Rangareddygari2016-04-201-13/+0
* Relocation of header files to ./tools/imageProcs directory and associatedClaus Michael Olsen2016-04-197-302/+32
* Fixes for OCB channel init and accessSangeetha T S2016-04-183-15/+71
* L2 p9_sbe_nest_startclocks -- drop abstclk|syncclk muxselJoe McGill2016-04-181-2/+2
* Level 2 HWP for p9_sbe_arrayinit.CAnusha Reddy Rangareddygari2016-04-151-0/+14
* Updates to the fapi2 putRing APIBilicon Patil2016-04-141-0/+248
* PCIE phase1/phase2 initialization procedure.Gou Peng Fei2016-04-141-0/+137
* Bootloader needs to dcbz the cache before using itMarty Gloff2016-04-142-3/+13
* Clear pfet force off in tp_chiplet_init3Ben Gass2016-04-141-0/+1
* Adding Thread Query feature to p9_thread_control HWP (Level 2)Thi Tran2016-04-145-117/+271
* Fix checker for PBARBUFVAL being ok if VALID or VALIDWFPCHRISTINA L. GRAVES2016-04-141-2/+8
* Per Sachin's request for SBE code I changed FAPI_INF traces to FAPI_DBGCHRISTINA L. GRAVES2016-04-143-8/+8
* Change CL DMA read ttype value to 6 instead of 3CHRISTINA L. GRAVES2016-04-141-1/+1
* Fix actions for EC CoresBill Hoffa2016-04-131-12/+12
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