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* Level 2 Procedure - p9_sbe_tp_arrayinitSunil.Kumar2015-10-022-19/+78
| | | | | | | | | Change-Id: I3f62b5f1768b3089013bd35fe45aa523e9603971 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20559 Tested-by: Jenkins Server Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* Level 2 Procedure - p9_sbe_lpc_initSunil.Kumar2015-09-282-26/+42
| | | | | | | | Change-Id: I209b3e7ffde805852d870d47d72ad19ea17302e8 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20603 Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Level 2 Procedure - p9_sbe_arrayinitSunil.Kumar2015-09-283-19/+112
| | | | | | | | Change-Id: I4b4292696f4a917e2f6ec68bd6c2a32868dc1aa2 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20723 Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Level 2 Procedure - p9_sbe_npll_setupSunil.Kumar2015-09-182-19/+140
| | | | | | | | | | Change-Id: If7848fb728826b294453fddfca2929b06cc099ed Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20553 Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* PERV SBE: Level 2 Procedure - p9_sbe_chiplet_pll_initfAbhishek Agarwal2015-09-162-20/+102
| | | | | | | | | | | | Scan initializing PLL config bits for XBus, OBus, PCIe, MC Chiplets Change-Id: I53dcb37413ba3c4bf53abf5d866ac014310333ae Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20068 Tested-by: Jenkins Server Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PERV SBE: Level 2 Procedure - p9_sbe_nest_enable_ridiAbhishek Agarwal2015-09-152-18/+75
| | | | | | | | | | | Enable ridi controls for NEST logic Change-Id: I4b9e72d195f99f8a42678cedbd9907aa5a22e895 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19277 Tested-by: Jenkins Server Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Level 2 Module -p9_perv_sbe_cmnSunil.Kumar2015-09-152-0/+439
| | | | | | | | Change-Id: I3fc0fa69299d3fb107f4d4d294543897dd07e9d6 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20515 Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Error XML files and respective entriesSunil.Kumar2015-09-158-17/+102
| | | | | | | | | Change-Id: I59fffab259bc0a55f76ab626319602588800c9ba Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20481 Tested-by: Jenkins Server Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PERV SBE: Level 2 Module - p9_sbe_commonAbhishek Agarwal2015-09-094-1/+397
| | | | | | | | | | | Modules for align_chiplets, clock_start_stop, set_scan_ratio Change-Id: I8a9d6f37042a0759ed71abb2c0522ef12741e0de Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19191 Reviewed-by: Soma Bhanutej Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Jenkins Server Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Support TARGET_TYPE_SYSTEM PPE attributesGreg Still2015-09-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | - Add support for SYSTEM types - Fix attribute "setting" bug for scalar attributes only; array attributes untested - Add nest_attributes.xml - Reduce extra whitespace per Gerrit comments (more) - Added debug switch to ppeParseAtteibuteInfo.pl - Add system attributes to merged .fixed section (base_ppe_header.S, proc_sbe_fixed.H, topfiles.mk) - Fixed FAPI2 regression setup based on newest SEEPROM and PIBMEM (SBE) linker layout. This implicates the Makefile (eg new "seeprom" rule). - Fix rebase issues with new commits. Added necessary dependent files and missing attribute enablement - Rebased with the merged "Fix compile" commit which moves the definition and setting of the global variables associated with attributes to target.C Change-Id: Iadbe080dec1558079ca6fe9c8fa711b098ba1e0b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20078 Tested-by: Jenkins Server Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Fix compilation issues in pervasiveSachin Gupta2015-09-032-3/+3
| | | | | | | | Change-Id: I8ea3fa77cdd4fac90cb72b06e71e947c2eb64b31 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20299 Tested-by: Jenkins Server Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com>
* PPE-HWP: [Level 2] Dllsetup Hcode ProcedureDavid Young2015-09-025-184/+489
| | | | | | | | | | | | | | Dllsetup runs on cronus. Wrapper function included. XML error file added. cachehcderror.mk updates with dll errors xml file Change-Id: I51189a9ca7c2541ddc86aeb7896feb23a2426f5b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19807 Tested-by: Jenkins Server Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PERV SBE: pervfiles.mk for perv procsAbhishek Agarwal2015-09-021-0/+3
| | | | | | | | | | updated with modules required for tp_arryainit, tp_chipletinit2, tp_chipletinit3 Change-Id: I578f88ee742a00beb70325d27a23af6c23658005 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19171 Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Tested-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PERV SBE: Level 2 Procedure - p9_sbe_tp_switch_gearsAbhishek Agarwal2015-08-312-22/+33
| | | | | | | | | | Switch from refclock to PLL AND adjust I2C Change-Id: I00e7532173dc9b4b576cc331391a20a72c28c4f6 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20099 Tested-by: Jenkins Server Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PERV SBE: Level 2 Module - p9_sbe_gear_switcherAbhishek Agarwal2015-08-313-0/+171
| | | | | | | | | | | | Modules for I2C Bit rate divisor setting and stop sequence on I2C Change-Id: I71b19cdb812eb2adedf55590ae9048eb9fb3f621 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20098 Tested-by: Jenkins Server Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Honor PPE partial good attributes to intialize targetsGreg Still2015-08-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | - Addressed internal Gerrit comments - Addressed compilation issues with real procedures - Fix image tool "clean" function (updated) (deals with missing tools/image/bin) - make "clean" fixup - Get vector of attribute values properly into the image - Fix FAPI_ATTR_* signature from target pointer to target reference - ATTR_CHIP_UNIT_POS support for non-core/cache chiplets - Require FAPI_ATTR_GET/SET invocation to be in the form of fapi2::ATTR_.... - Fix tools bin directory creation issue - Address plat_PervPGTargets error case - Add FAPI_EXEC_HW support to deal with recently merged functions - Update libcommonerrors.mk to deal with recently merged compilation issue Change-Id: I31485ff05731e7fbaa0453d8ed9985b9ca56b8b3 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19342 Tested-by: Jenkins Server Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Amit J. Tendolkar <amit.tendolkar@in.ibm.com>
* PPE-HWP: [Level 2] Poweronoff Hcode Procedures using APIDavid Young2015-08-1810-134/+1312
| | | | | | | | | | | | | | Poweronoff, core_poweron, cache_poweron run on cronus. Wrapper functions included. Multiple targets enabled and tested. Poweron core only turns on Vdd. XML error file added. Change-Id: I0b334b5f3f2c36bc4499bd6e16acf472dd3c6c41 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17846 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Tested-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Simics action file for istep2 proceduresSunil.Kumar2015-08-141-0/+472
| | | | | | | Change-Id: I13da6db04704d4ccdbbfb2fc0004b9ee50f51356 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19441 Tested-by: Jenkins Server Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* p9_sbe_fabricinit - add error XML and build dependenciesJoe McGill2015-08-134-2/+50
| | | | | | | | | | Change-Id: I05e27dbcaf0b0205c7e515cedc666b85f22f8e2b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19717 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Jenkins Server Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 2 Procedure - p9_sbe_tp_enable_ridiAbhishek Agarwal2015-08-132-18/+25
| | | | | | | | | | | Enables ridi bits in RC regs after scan initialize and start clock the pervasive chiplet Change-Id: I21c6efd954bc6befedda68bea6059f27394d4d44 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19077 Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* Add SBE support for per directory error XML filesSachin Gupta2015-07-287-0/+210
| | | | | | | | | - Added parseErrorInfo.pl Change-Id: I263797070f09d0b869f3de52916049574d272cb6 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18819 Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Tested-by: Jennifer A. Stofer <stofer@us.ibm.com>
* added nest compilationDerk Rembold2015-07-221-1/+1
| | | | | | | | | Change-Id: Ib35a7e5a13ff7384f483f68b6f376774f7a10607 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19238 Reviewed-by: GIRISANKAR PAULRAJ <gpaulraj@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* NEST SBE L1 Proc p9_sbe_MCS_setup, p9_sbe_scominitGirisankar Paulraj2015-07-226-0/+273
| | | | | | | | | Change-Id: I9e638e04ad0e77d72f93e3b1dfba0d2b2dbc425f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17850 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* pervfiles.mk Update for evid procedureSachin Gupta2015-07-171-0/+1
| | | | | | | | Change-Id: Ic2a8f21059f9a2f00dc1b43847197c7be7603139 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19141 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 2 Procedure - p9_sbe_tp_chiplet_resetAbhishek Agarwal2015-07-162-22/+34
| | | | | | | | | | | | | Procedure to setup hangcounter 6 for TP chiplet Change-Id: I8d29166ac60981dd6b21430ba49a960938c94f86 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18554 Reviewed-by: Johannes Koesters <koesters@de.ibm.com> Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 2 Procedure - p9_sbe_tp_chiplet_init1Abhishek Agarwal2015-07-162-26/+57
| | | | | | | | | Initial steps of PIB AND PCB Change-Id: I55969c9139af10115852988f8b4086fea312c431 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18427 Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: pervfiles.mk for perv procsAbhishek Agarwal2015-07-131-14/+18
| | | | | | | | Change-Id: I5c2c74f6400a7cf94ab93fdef0e47634a1973f07 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18849 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_startclock_chipletsAbhishek Agarwal2015-07-082-0/+65
| | | | | | | | | | | | Start clock procedure for Xbus, Obus, PCIe Change-Id: Ia7ef79f162b6ec8eef398f690e8bcdf404318553 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18546 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_arrayinitAbhishek Agarwal2015-07-083-0/+77
| | | | | | | | | | | | | HWP name changed from sbe_nestarrayinit to sbe_arrayinit Has new UML framework perv profile release 1.2.14 Change-Id: I768c9c1c3271d278adbf5410d1e9faa7d4907906 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18552 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* Initial version of core and cache HCode doxygen generation filesGreg Still2015-07-034-0/+3480
| | | | | | | | | | Change-Id: Ia7b25a8addd2151153cb862647146add33a83999 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17607 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Files deleted because of name changeAbhishek Agarwal2015-07-028-261/+0
| | | | | | | | | | | | HWP name changed from sbe_nest_chiplet_reset to sbe_chiplet_reset HWP name changed from sbe_nest_gptr_time_repr_initf to sbe_gptr_time_repr_initf HWP name changed from sbe_nest_chiplet_init to sbe_chiplet_init HWP name changed from sbe_nest_arrayinit to sbe_arrayinit Change-Id: I6c5d72d85861300fbf2b34498e61fc28f43c9a88 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18553 Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_gptr_time_repr_initfAbhishek Agarwal2015-07-022-0/+70
| | | | | | | | | | | | | HWP name changed from sbe_nest_gptr_time_repr_initf to sbe_gptr_time_repr_initf Has new UML framework perv profile release 1.2.14 Change-Id: I8a2be35546490c2d095d8cc9dc737f8224bfc1be Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18548 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Johannes Koesters <koesters@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* Recommit of p9_sbe_setup_evid for Level 1Derk Rembold2015-07-012-0/+99
| | | | | | | | | | | | | | | | - Change 17359 was orignally closed (review) for Level 1. However, that change was not formally merged to master (apparently) as a rebase has these files missing. - Added copyright - fixed unused variable Change-Id: Ie0c7b44fce86d4c50df11620a2f36c4e48c8452d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18396 Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com> Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_chiplet_pll_setupAbhishek Agarwal2015-06-302-0/+68
| | | | | | | | | | | | | | PLL set up for L2 and L3 plls Change-Id: I8392b0880c289ed3d6c41ad791badbba028325f1 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18543 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Johannes Koesters <koesters@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_nest_enable_ridiAbhishek Agarwal2015-06-302-0/+68
| | | | | | | | | | | | | | Enable ridi controls for NEST logic Change-Id: Ia267196d72ee6044cf8ed59763c08e46cc91d6ef Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18539 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Johannes Koesters <koesters@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_chiplet_pll_initfAbhishek Agarwal2015-06-302-0/+68
| | | | | | | | | | | | | | procedure for scan initializing PLL config bits for L2 and L3 plls Change-Id: I62ea0dd17c1714c817fb271af0cc5643a2b67273 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18542 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Johannes Koesters <koesters@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_tp_enable_ridiAbhishek Agarwal2015-06-302-0/+68
| | | | | | | | | | | | | | Enables ridi bits in RC regs after scan initialize and start clock the pervasive chiplet Change-Id: I610bd9f83d1b1f8c8f784d93bcc38c07068b3fed Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18544 Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Johannes Koesters <koesters@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_chiplet_initAbhishek Agarwal2015-06-303-0/+93
| | | | | | | | | | HWP name changed from sbe_nest_chiplet_init to sbe_chiplet_init Has new UML framework perv profile release 1.2.14 Change-Id: I60455cc8e7cb79758895abba032a8ebb8f6a719f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18550 Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* move pervasive_attributes.xml to where it belongsDerk Rembold2015-06-291-125/+0
| | | | | | | | | Change-Id: I32ef5efe272dfff14d620e6817eccbdfd68a84e6 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18715 Reviewed-by: GIRISANKAR PAULRAJ <gpaulraj@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* p9_sbe_fabricinit L3 deliveryJoe McGill2015-06-252-0/+284
| | | | | | | | | | Change-Id: I6ca3b517d10ec3c0bf7245f84fb4b96d0b49e44c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18481 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Tested-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PERV SBE: Level 1 Procedure - p9_sbe_chiplet_resetAbhishek Agarwal2015-06-252-0/+88
| | | | | | | | | | HWP name changed from sbe_nest_chiplet_reset to sbe_chiplet_reset Has new UML framework perv profile release 1.2.14 Change-Id: Ic3fac54ccfa2a78bcb12c42830cc26b777359510 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18541 Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* L1 Rev istep 0.(6-8,11,13,14),1.1,2.(1-13,15,18-20,22,26,27,30,32,34) V2Abhishek Agarwal2015-05-2759-106/+2014
| | | | | | | | | Change-Id: I3ea0eec08ce479057277524021bfce540d7b63ca Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17755 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Tested-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* files to create base image, corrected pervfiles.mkDerk Rembold2015-05-212-0/+80
| | | | | | | | Change-Id: I78f6f1aa49c2f11b2e3ede82f19b48d7f14a50a8 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17478 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2015-05-0870-0/+4610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch 6 Update: FW owner email address fix Patch 5 Update: target types fixed, all compiles now. (Will rework them when multicast target is ready in Fapi2) add @brief to function doxygen add FW Owners to all headers typo fixes Note: NOT fixed with this update or this level 1 release but was commented: 1) still need a solution for document attributes in doxygen headers. 2) All traces in procedures including entry/exit are going to be finalized in future releases as the function body development reaches next maturity. There will be more discussion in-term/inter-term on how to do tracing overall on these procs, dont want to block this release because of it. Patch 3 Update: addressed comments from Patch 2 review. merged p9_hcd_cache/core_sp_runtime_scom and p9_hcd_cache/core_host_runtime_scom into p9_hcd_cache/core_ras_runtime_scom based on changes in P9_IPL_Flow.doc(v55) Patch 2 Update: renamed proc_* to p9_* for all procedure filenames per comment in Patch 1 Note: 1) Due to ongoing interface discussion and resolution, some of these procedures are not yet ready for building under Cronus. Regular Fapi2 build is ready. If you see some of Fapi2 Target Types in these procedures are not in Fapi2 yet, that is because they are currently in discussion of addition to Fapi2. 2) There are ongoing function body development in the code, which are all "#if 0" out in this level 1 release. The effective code in all files are only the API prototypes. Please focus your review only to the interfaces. 3) cache/core runinit is for SGPE and CME at runtime only, not for IPL or SBE. 4) common_pro_epi_log and common_poweronoff are subroutine support(not in IPL_Flow) Change-Id: I46f07bb3e7cf050256c123e7f16982ccead2ceda Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17193 Reviewed-by: Reshmi Nair <reshminair@in.ibm.com> Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Tested-by: Brian Silver <bsilver@us.ibm.com>
* Rename to p9_sbe... and address Gerrit Level 1 commentsGreg Still2015-04-282-0/+106
| | | | | | | | | | | | | - address some more Gerrit comments to move to "using fapi2::.." elements - add a Doxygen brief in the .H - explicitly add "using fapi2::.." to each file for the elements used. Change-Id: Ida10902e51892fd19cfb5c2ca7375a7f0da64bb2 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17359 Reviewed-by: Reshmi Nair <reshminair@in.ibm.com> Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Tested-by: Brian Silver <bsilver@us.ibm.com>
* added new sbe dir structure decided by Dean, GregDerk Rembold2015-03-115-0/+0
Change-Id: I9af1450461e77606fd91831773abaac454735c45 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16290 Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com>
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