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* Incorrect assembler generated in Powerpc to PPE tool for multiplyDoug Gilbert2015-11-061-12/+27
* SEEPROM image: section for hostboot bootloaderMartin Peschke2015-11-063-20/+27
* added plat_trace.H include for FAPI_ERR use in buffer.HMatt K. Light2015-11-061-0/+1
* IfCompiler: migrated to ekb build structure for scomsPrachi Gupta2015-11-061-0/+1
* fapi2 doxygen warning/error cleanup from ecmd repositoryKahn Evans2015-11-0614-584/+597
* buffer reverse not working correctlyRichard Knight2015-11-061-76/+105
* VBU IPL regression framework for isteps 0-5Joe McGill2015-11-061-1/+1
* FBC Level 1 proceduresJoe McGill2015-11-062-15/+435
* p9_mss_eff_grouping procedure (Level 1)Thi Tran2015-11-061-48/+233
* Add base FAPI2 attribute definitionsJoe McGill2015-11-061-7/+0
* Level 2 HWP for p9_sbe_tp_chiplet_init1Anusha Reddy Rangareddygari2015-11-062-23/+32
* Nest Level 2 SBE ProceduresJoe McGill2015-11-066-14/+521
* Makefile Infrastructure for SBE Level 2 HWPsSunil.Kumar2015-11-0613-10/+517
* PERV SBE: Level 2 Procedure - p9_sbe_tp_chiplet_resetAbhishek Agarwal2015-11-062-22/+34
* PERV SBE: Level 2 Procedure - p9_sbe_tp_chiplet_init1Abhishek Agarwal2015-11-062-26/+57
* Fix compilation issues in pervasiveSachin Gupta2015-11-061-2/+2
* PERV SBE: Level 2 Procedure - p9_sbe_tp_switch_gearsAbhishek Agarwal2015-11-062-22/+33
* Level 2 Procedure -p9_sbe_tp_chiplet_init3Sunil.Kumar2015-11-063-21/+164
* Level 2 Procedure - p9_sbe_npll_initfSunil.Kumar2015-11-062-19/+50
* Level 2 Procedure - p9_sbe_tp_arrayinitSunil.Kumar2015-11-063-19/+109
* Level 2 Procedure -p9_sbe_tp_chiplet_init2Sunil.Kumar2015-11-062-21/+47
* Level 2 Procedure - p9_sbe_nest_startclocksSunil.Kumar2015-11-063-21/+538
* Level 2 Procedure - p9_sbe_lpc_initSunil.Kumar2015-11-062-26/+42
* Level 2 Procedure - p9_sbe_attr_setupSunil.Kumar2015-11-062-22/+113
* Level 2 Procedure - p9_sbe_npll_setupSunil.Kumar2015-11-062-19/+140
* L1 Rev istep 0.(6-8,11,13,14),1.1,2.(1-13,15,18-20,22,26,27,30,32,34) V2Abhishek Agarwal2015-11-0646-0/+2387
* Level 2 Procedure -p9_sbe_chiplet_initSunil.Kumar2015-11-063-18/+128
* Checking in the L2 p9_sbe_load_bootloader proceduresCHRISTINA L. GRAVES2015-11-061-0/+3
* Level 2 Procedure -p9_sbe_gptr_time_repr_initfSunil.Kumar2015-11-062-19/+92
* Shift HWP content to align with desired EKB layoutJoe McGill2015-11-065-33/+288
* Level 2 Procedure - p9_sbe_chiplet_resetSunil.Kumar2015-11-062-36/+756
* Level 2 Procedure - p9_sbe_arrayinitSunil.Kumar2015-11-063-17/+140
* PERV SBE: Level 2 Procedure - p9_sbe_chiplet_pll_initfAbhishek Agarwal2015-11-062-20/+102
* Level 2 Module -p9_perv_sbe_cmnSunil.Kumar2015-11-062-0/+475
* PERV SBE: Level 2 Procedure - p9_sbe_nest_enable_ridiAbhishek Agarwal2015-11-062-18/+75
* PERV SBE: Level 2 Module - p9_sbe_commonAbhishek Agarwal2015-11-062-0/+407
* Level 2 Procedure -p9_sbe_chiplet_pll_setupSunil.Kumar2015-11-063-20/+186
* PERV SBE: Level 2 Procedure - p9_sbe_tp_enable_ridiAbhishek Agarwal2015-11-062-18/+25
* NEST SBE L1 Proc p9_sbe_MCS_setup, p9_sbe_scominitGirisankar Paulraj2015-11-064-0/+219
* PERV SBE: Level 1 Procedure - p9_sbe_arrayinitAbhishek Agarwal2015-11-062-0/+101
* PERV SBE: Level 1 Procedure - p9_sbe_startclock_chipletsAbhishek Agarwal2015-11-062-0/+101
* PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute definedYue Du2015-11-0654-0/+4790
* PERV SBE: Level 2 Module - p9_sbe_gear_switcherAbhishek Agarwal2015-11-062-0/+195
* PERV SBE: Level 1 Procedure - p9_sbe_gptr_time_repr_initfAbhishek Agarwal2015-11-062-0/+106
* PERV SBE: Level 1 Procedure - p9_sbe_chiplet_pll_setupAbhishek Agarwal2015-11-062-0/+104
* Generated from n10_e9024_tp023_spider_u223_01Ben Gass2015-11-0610-0/+93708
* p9_sbe_fabricinit L3 deliveryJoe McGill2015-11-062-0/+284
* PERV SBE: Level 1 Procedure - p9_sbe_tp_enable_ridiAbhishek Agarwal2015-11-062-0/+104
* PERV SBE: Level 1 Procedure - p9_sbe_chiplet_initAbhishek Agarwal2015-11-062-0/+104
* HWP: [Level 2] p9_sbe_fabricint updateJoe McGill2015-11-061-49/+0
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