diff options
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/core')
31 files changed, 31 insertions, 31 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/Makefile b/src/import/chips/p9/procedures/hwp/core/Makefile index 15ace37d..0ef85918 100644 --- a/src/import/chips/p9/procedures/hwp/core/Makefile +++ b/src/import/chips/p9/procedures/hwp/core/Makefile @@ -1,7 +1,7 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # -# $Source: import/chips/p9/procedures/hwp/core/Makefile $ +# $Source: src/import/chips/p9/procedures/hwp/core/Makefile $ # # OpenPOWER sbe Project # diff --git a/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk b/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk index b7c2abcc..69b681fb 100644 --- a/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk +++ b/src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk @@ -1,7 +1,7 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # -# $Source: import/chips/p9/procedures/hwp/core/corehcdfiles.mk $ +# $Source: src/import/chips/p9/procedures/hwp/core/corehcdfiles.mk $ # # OpenPOWER sbe Project # diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H index 1c766fb3..c3310789 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C index 0706e244..6145ad1a 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H index dde880ee..cc8daf0b 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_arrayinit.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C index 9007a7f8..d954b97d 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H index c86b128c..00896101 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_init.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H index 9db24521..e2f2d206 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C index fa147a3d..38645d6b 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H index 22c88c3f..e162d0e2 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_gptr_time_initf.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C index 86e72aac..8dac9915 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H index accbf0ea..ca278ec2 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_initf.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C index 9211d7fc..cfe8fe40 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H index 7dad1c6e..c6f77b9f 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_occ_runtime_scom.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C index 729f98b7..7e83c95f 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H index f3bfad93..aa6c6c1d 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_pcb_arb.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C index 5e66f673..5dda8e1d 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H index 91b73cf9..8528c491 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_poweron.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C index 6ad7100f..fe760e5c 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H index 511b35c4..65657c1d 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_ras_runtime_scom.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C index b8f6be7e..ec8f73db 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H index a998c4bd..bd510b03 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_repair_initf.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C index 54ed6dd5..8c199de8 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H index f69ce528..79a74c7f 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H index 7065028e..9e6434b4 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C index 3cccb8b5..d7bf6491 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H index 75e94909..514d52e4 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C index fb6affa0..20cdcf05 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H index d143fd43..e82ba9b0 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C index 529fd829..742244d5 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_thread_control.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_thread_control.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H index 14821a5c..6c39f07e 100755 --- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H +++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/core/p9_thread_control.H $ */ +/* $Source: src/import/chips/p9/procedures/hwp/core/p9_thread_control.H $ */ /* */ /* OpenPOWER sbe Project */ /* */ |
