diff options
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H new file mode 100644 index 00000000..0da2ea3b --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_dpll_setup.H $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file p9_hcd_cache_dpll_setup.H +/// @brief Quad DPLL Setup +/// + +// *HWP HWP Owner : David Du <daviddu@us.ibm.com> +// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com> +// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com> +// *HWP Team : PM +// *HWP Consumed by : SBE:SGPE +// *HWP Level : 2 + +#ifndef __P9_HCD_CACHE_DPLL_SETUP_H__ +#define __P9_HCD_CACHE_DPLL_SETUP_H__ + +#include <fapi2.H> + +/// @typedef p9_hcd_cache_dpll_setup_FP_t +/// function pointer typedef definition for HWP call support +typedef fapi2::ReturnCode (*p9_hcd_cache_dpll_setup_FP_t) ( + const fapi2::Target<fapi2::TARGET_TYPE_EQ>&); + +extern "C" +{ +/// @brief Quad DPLL Setup +/// +/// @param [in] i_target TARGET_TYPE_EQ target +/// +/// @attr +/// @attritem ATTR_DPLL_REPAIR_RING - EQ target, uint32 +/// repair dpll ring content<br> +/// +/// @retval FAPI2_RC_SUCCESS + fapi2::ReturnCode + p9_hcd_cache_dpll_setup( + const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target); + + +} // extern C + +#endif // __P9_HCD_CACHE_DPLL_SETUP_H__ |
