diff options
| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-01-12 09:42:10 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-12-17 21:14:29 -0600 |
| commit | 8a8152b3899d439e530cb3e514072caa92a232c5 (patch) | |
| tree | 9e06a6d185ae619c9a379f5641e641692c3f5bc6 /src | |
| parent | 67d2399b059366ac2e2a49e598a4df18be102537 (diff) | |
| download | talos-sbe-8a8152b3899d439e530cb3e514072caa92a232c5.tar.gz talos-sbe-8a8152b3899d439e530cb3e514072caa92a232c5.zip | |
Updates custom RD CTR pattern
Change-Id: I7a23b502626df75f371957345f18d788a534ba87
CQ:SW413773
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51872
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: LUCAS W. MULKEY <lwmulkey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69811
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 5667e893..172fe90b 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -1981,13 +1981,13 @@ The first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute is set to 0, using the default values of: - 0x13EC for PATTERN0 - 0x02FD for PATTERN1 + 0x8E8E for PATTERN0 + 0x2BC6 for PATTERN1 Set to default in eff_config </description> <valueType>uint32</valueType> <initToZero></initToZero> - <enum>DEFAULT_PATTERN0 = 0xEA0C, DEFAULT_PATTERN1 = 0xA6C9</enum> + <enum>DEFAULT_PATTERN0 = 0x8E8E, DEFAULT_PATTERN1 = 0x2BC6</enum> <writeable/> <array>2</array> <mssAccessorName>custom_training_adv_patterns</mssAccessorName> @@ -2013,7 +2013,7 @@ </description> <valueType>uint32</valueType> <initToZero></initToZero> - <enum>DEFAULT_PATTERN0 = 0x13EC, DEFAULT_PATTERN1 = 0x02FD</enum> + <enum>DEFAULT_PATTERN0 = 0xEA0C, DEFAULT_PATTERN1 = 0xA6C9</enum> <writeable/> <array>2</array> <mssAccessorName>custom_training_adv_backup_patterns</mssAccessorName> |
