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authorRaja Das <rajadas2@in.ibm.com>2016-11-23 14:28:12 -0600
committerspashabk-in <shakeebbk@in.ibm.com>2016-12-20 05:18:49 -0600
commit79d9d591cac18da347c86a62a12ad5be35a60453 (patch)
treec7fd6a21e2bcc58d149b3369f8bb23fbda62a31e /src
parent20bd30af528676a584f11e7f78275cc4428dcec0 (diff)
downloadtalos-sbe-79d9d591cac18da347c86a62a12ad5be35a60453.tar.gz
talos-sbe-79d9d591cac18da347c86a62a12ad5be35a60453.zip
p9_sbe_nest_startclocks.C optimized
Change-Id: I15763a8d00a0edfc2e9ece1b9678c54591652bfe RTC: 164680 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32965 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32966 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C324
1 files changed, 95 insertions, 229 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
index 90cd26ce..3b89b8ff 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C
@@ -58,21 +58,8 @@ enum P9_SBE_NEST_STARTCLOCKS_Private_Constants
DONT_STARTSLAVE = 0x0
};
-static fapi2::ReturnCode p9_sbe_nest_startclocks_N3_fence_drop(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- const fapi2::buffer<uint64_t> i_pg_vector);
-
-static fapi2::ReturnCode p9_sbe_nest_startclocks_get_attr_pg(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- fapi2::buffer<uint16_t>& o_attr_pg);
-
-static fapi2::ReturnCode p9_sbe_nest_startclocks_mc_fence_drop(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- const fapi2::buffer<uint64_t> i_pg_vector);
-
static fapi2::ReturnCode p9_sbe_nest_startclocks_nest_fence_drop(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- const fapi2::buffer<uint64_t> i_pg_vector);
+ const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
fapi2::ReturnCode p9_sbe_nest_startclocks(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
@@ -87,289 +74,168 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const
fapi2::buffer<uint16_t> l_n3_ccstatus_regions;
FAPI_INF("p9_sbe_nest_startclocks: Entering ...");
+ auto l_perv_nest_mc_func = i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(
+ static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
+ fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP),
+ fapi2::TARGET_STATE_FUNCTIONAL);
+
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE, i_target_chip,
l_read_flush_attr));
FAPI_TRY(p9_sbe_common_get_pg_vector(i_target_chip, l_pg_vector));
FAPI_DBG("pg targets vector: %#018lX", l_pg_vector);
- for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL))
- {
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_target_cplt,
- REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_clock_regions));
-
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_target_cplt,
- REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_ccstatus_regions));
- }
-
FAPI_INF("Reading ATTR_MC_SYNC_MODE");
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_read_attr));
- fapi2::TargetFilter l_nest_filter, l_nest_tp_filter, l_dd1_filter_without_N3;
-
- if (l_read_attr)
+ // NEST WEST
+ for (auto& nest : l_perv_nest_mc_func)
{
- l_nest_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
- fapi2::TARGET_FILTER_ALL_NEST);
- l_nest_tp_filter = static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC
- | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP);
- l_dd1_filter_without_N3 = static_cast<fapi2::TargetFilter>
- (fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_NEST_NORTH |
- fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST |
- fapi2::TARGET_FILTER_TP);
- }
- else
- {
- l_nest_filter = fapi2::TARGET_FILTER_ALL_NEST;
- l_nest_tp_filter = static_cast<fapi2::TargetFilter>
- (fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_TP);
- l_dd1_filter_without_N3 = static_cast<fapi2::TargetFilter>
- (fapi2::TARGET_FILTER_NEST_NORTH | fapi2::TARGET_FILTER_NEST_SOUTH |
- fapi2::TARGET_FILTER_NEST_EAST | fapi2::TARGET_FILTER_TP);
- }
+ if(nest.getChipletNumber() == 5)
+ {
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(nest,
+ REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_clock_regions));
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL))
- {
- FAPI_DBG("Drop chiplet fence for N3");
- FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_trgt_chplt, l_pg_vector));
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(nest,
+ REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_n3_ccstatus_regions));
+ break;
+ }
}
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
- fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
- fapi2::TARGET_STATE_FUNCTIONAL))
+ // All NEST & MC (Check PG bit respectively)
+ for (auto& perv : l_perv_nest_mc_func)
{
- FAPI_DBG("Drop chiplet fence for N0,N1,N2");
- FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(l_trgt_chplt, l_pg_vector));
- }
+ uint32_t l_chipletID = perv.getChipletNumber();
- if ( l_read_attr )
- {
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL))
+ if( ((l_chipletID == 5) && (l_pg_vector.getBit<1>() == 1)) ||
+ ((l_chipletID == 2 || l_chipletID == 3 || l_chipletID == 4) && (l_pg_vector.getBit<5>() == 1)) ||
+ (l_read_attr && ((l_chipletID == 7) && (l_pg_vector.getBit<5>() == 1))) ||
+ (l_read_attr && (l_chipletID == 8) && (l_pg_vector.getBit<3>() == 1)) )
{
- FAPI_DBG("Drop chiplet fence for MC");
- FAPI_TRY(p9_sbe_nest_startclocks_mc_fence_drop(l_trgt_chplt, l_pg_vector));
+ FAPI_DBG("Drop chiplet fence for N3 // N0,N1,N2 // MC");
+ FAPI_TRY(p9_sbe_nest_startclocks_nest_fence_drop(perv));
}
}
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (l_nest_filter, fapi2::TARGET_STATE_FUNCTIONAL))
+ for (auto& perv : l_perv_nest_mc_func)
{
- FAPI_TRY(p9_sbe_nest_startclocks_get_attr_pg(l_trgt_chplt, l_attr_pg));
+ uint32_t l_chipletID = perv.getChipletNumber();
+
+ if(!l_read_attr && (l_chipletID == 7 || l_chipletID == 8))
+ {
+ continue;
+ }
+
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, perv, l_attr_pg));
FAPI_DBG("Call common_cplt_ctrl_action_function for Nest and Mc chiplets");
- FAPI_TRY(p9_sbe_common_cplt_ctrl_action_function(l_trgt_chplt, l_attr_pg));
- }
+ FAPI_TRY(p9_sbe_common_cplt_ctrl_action_function(perv, l_attr_pg));
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (l_nest_tp_filter, fapi2::TARGET_STATE_FUNCTIONAL))
- {
FAPI_DBG("Call module align chiplets for Nest and Mc chiplets");
- FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt));
+ FAPI_TRY(p9_sbe_common_align_chiplets(perv));
}
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
- fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
- fapi2::TARGET_STATE_FUNCTIONAL))
+ for (auto& perv : l_perv_nest_mc_func)
{
- FAPI_DBG("Regions value: %#018lX", l_clock_regions);
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt,
- REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
-
- FAPI_DBG("Call module clock start stop for N0, N1, N2");
- FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD, STARTSLAVE,
- DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
- }
+ uint32_t l_chipletID = perv.getChipletNumber();
- for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL))
- {
- FAPI_TRY(p9_sbe_common_clock_start_stop(l_target_cplt, CLOCK_CMD,
- DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES));
- }
+ if(l_chipletID == 2 || l_chipletID == 3 || l_chipletID == 4)
+ {
+ FAPI_DBG("Regions value: %#018lX", l_clock_regions);
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(perv,
+ REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH |
- fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST),
- fapi2::TARGET_STATE_FUNCTIONAL))
- {
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(l_trgt_chplt,
- REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions));
- FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions);
+ FAPI_DBG("Call module clock start stop for N0, N1, N2");
+ FAPI_TRY(p9_sbe_common_clock_start_stop(perv, CLOCK_CMD, STARTSLAVE,
+ DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
+ }
- FAPI_DBG("Call clockstatus check function for N0,N1,N2");
- FAPI_TRY(p9_sbe_common_check_cc_status_function(l_trgt_chplt, CLOCK_CMD,
- l_ccstatus_regions, CLOCK_TYPES));
+ if(l_chipletID == 5)
+ {
+ FAPI_TRY(p9_sbe_common_clock_start_stop(perv, CLOCK_CMD,
+ DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES));
+ }
}
- for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL))
+ for (auto& perv : l_perv_nest_mc_func)
{
- FAPI_DBG("Call clockstatus check function for N3");
- FAPI_TRY(p9_sbe_common_check_cc_status_function(l_target_cplt, CLOCK_CMD,
- l_n3_ccstatus_regions, CLOCK_TYPES));
- }
+ uint32_t l_chipletID = perv.getChipletNumber();
- if ( l_read_attr )
- {
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL))
+ if(l_chipletID == 2 || l_chipletID == 3 || l_chipletID == 4)
{
- FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt,
- REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
- FAPI_DBG("Regions value: %#018lX", l_clock_regions);
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_16(perv,
+ REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_ccstatus_regions));
+ FAPI_DBG("Regions value: %#018lX", l_ccstatus_regions);
- FAPI_DBG("Call module clock start stop for MC01, MC23.");
- FAPI_TRY(p9_sbe_common_clock_start_stop(l_trgt_chplt, CLOCK_CMD,
- DONT_STARTSLAVE, DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
+ FAPI_DBG("Call clockstatus check function for N0,N1,N2");
+ FAPI_TRY(p9_sbe_common_check_cc_status_function(perv, CLOCK_CMD,
+ l_ccstatus_regions, CLOCK_TYPES));
}
- }
- if ( l_read_flush_attr )
- {
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (l_dd1_filter_without_N3, fapi2::TARGET_STATE_FUNCTIONAL))
+ if(l_chipletID == 5)
{
- FAPI_DBG("clear flush_inhibit to go into flush mode");
- FAPI_TRY(p9_sbe_common_flushmode(l_trgt_chplt));
+ FAPI_DBG("Call clockstatus check function for N3");
+ FAPI_TRY(p9_sbe_common_check_cc_status_function(perv, CLOCK_CMD,
+ l_n3_ccstatus_regions, CLOCK_TYPES));
}
}
- else
+
+ for (auto& perv : l_perv_nest_mc_func)
{
- for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (l_nest_tp_filter, fapi2::TARGET_STATE_FUNCTIONAL))
+ // MC
+ uint32_t l_chipletID = perv.getChipletNumber();
+
+ if( l_read_attr && (l_chipletID == 7 || l_chipletID == 8) )
{
- FAPI_DBG("clear flush_inhibit to go into flush mode");
- FAPI_TRY(p9_sbe_common_flushmode(l_trgt_chplt));
+ FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(perv,
+ REGIONS_ALL_EXCEPT_VITAL_NESTPLL, l_clock_regions));
+ FAPI_DBG("Regions value: %#018lX", l_clock_regions);
+
+ FAPI_DBG("Call module clock start stop for MC01, MC23.");
+ FAPI_TRY(p9_sbe_common_clock_start_stop(perv, CLOCK_CMD,
+ DONT_STARTSLAVE, DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES));
}
}
- FAPI_INF("p9_sbe_nest_startclocks: Exiting ...");
-
-fapi_try_exit:
- return fapi2::current_err;
-
-}
-
-/// @brief Drop chiplet fence for OB chiplet
-///
-/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
-/// @param[in] i_pg_vector Pg vector of targets
-/// @return FAPI2_RC_SUCCESS if success, else error code.
-static fapi2::ReturnCode p9_sbe_nest_startclocks_N3_fence_drop(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- const fapi2::buffer<uint64_t> i_pg_vector)
-{
- fapi2::buffer<uint64_t> l_data64;
- FAPI_INF("p9_sbe_nest_startclocks_N3_fence_drop: Entering ...");
-
- if ( i_pg_vector.getBit<1>() == 1 )
+ for (auto& perv : l_perv_nest_mc_func)
{
- FAPI_DBG("Drop chiplet fence");
- //Setting NET_CTRL0 register value
- l_data64.flush<1>();
- l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0
- FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
- }
-
- FAPI_INF("p9_sbe_nest_startclocks_N3_fence_drop: Exiting ...");
-
-fapi_try_exit:
- return fapi2::current_err;
-
-}
-
-/// @brief get attr_pg for the chiplet
-///
-/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
-/// @param[out] o_attr_pg ATTR_PG for the chiplet
-/// @return FAPI2_RC_SUCCESS if success, else error code.
-static fapi2::ReturnCode p9_sbe_nest_startclocks_get_attr_pg(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- fapi2::buffer<uint16_t>& o_attr_pg)
-{
- FAPI_INF("p9_sbe_nest_startclocks_get_attr_pg: Entering ...");
-
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, i_target_chiplet, o_attr_pg));
-
- FAPI_INF("p9_sbe_nest_startclocks_get_attr_pg: Exiting ...");
-
-fapi_try_exit:
- return fapi2::current_err;
-
-}
-
-/// @brief Drop chiplet fence for MC
-///
-/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
-/// @param[in] i_pg_vector Pg vector of targets
-/// @return FAPI2_RC_SUCCESS if success, else error code.
-static fapi2::ReturnCode p9_sbe_nest_startclocks_mc_fence_drop(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- const fapi2::buffer<uint64_t> i_pg_vector)
-{
- uint8_t l_read_attrunitpos = 0;
- fapi2::buffer<uint64_t> l_data64;
- FAPI_INF("p9_sbe_nest_startclocks_mc_fence_drop: Entering ...");
+ uint32_t l_chipletID = perv.getChipletNumber();
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, i_target_chiplet,
- l_read_attrunitpos));
-
- if ( l_read_attrunitpos == 0x07 )
- {
- if ( i_pg_vector.getBit<5>() == 1 )
+ if(l_chipletID == 5 && l_read_flush_attr)
{
- FAPI_DBG("Drop chiplet fence");
- //Setting NET_CTRL0 register value
- l_data64.flush<1>();
- l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0
- FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
+ continue;
}
- }
- if ( l_read_attrunitpos == 0x08 )
- {
- if ( i_pg_vector.getBit<3>() == 1 )
+ if(!l_read_attr && (l_chipletID == 7 || l_chipletID == 8))
{
- FAPI_DBG("Drop chiplet fence");
- //Setting NET_CTRL0 register value
- l_data64.flush<1>();
- l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0
- FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
+ continue;
}
+
+ FAPI_DBG("clear flush_inhibit to go into flush mode");
+ FAPI_TRY(p9_sbe_common_flushmode(perv));
}
- FAPI_INF("p9_sbe_nest_startclocks_mc_fence_drop: Exiting ...");
+ FAPI_INF("p9_sbe_nest_startclocks: Exiting ...");
fapi_try_exit:
return fapi2::current_err;
-
}
-/// @brief Drop chiplet fence for pcie chiplet
+/// @brief Drop chiplet fence for perv chiplet (MC, NEST)
///
/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
-/// @param[in] i_pg_vector Pg vector of targets
/// @return FAPI2_RC_SUCCESS if success, else error code.
static fapi2::ReturnCode p9_sbe_nest_startclocks_nest_fence_drop(
- const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet,
- const fapi2::buffer<uint64_t> i_pg_vector)
+ const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
{
fapi2::buffer<uint64_t> l_data64;
FAPI_INF("p9_sbe_nest_startclocks_nest_fence_drop: Entering ...");
- if ( i_pg_vector.getBit<5>() == 1 )
- {
- FAPI_DBG("Drop chiplet fence");
- //Setting NET_CTRL0 register value
- l_data64.flush<1>();
- l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0
- FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
- }
+ FAPI_DBG("Drop chiplet fence");
+ //Setting NET_CTRL0 register value
+ l_data64.flush<1>();
+ l_data64.clearBit<PERV_1_NET_CTRL0_FENCE_EN>(); //NET_CTRL0.FENCE_EN = 0
+ FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WAND, l_data64));
FAPI_INF("p9_sbe_nest_startclocks_nest_fence_drop: Exiting ...");
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