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| author | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-23 21:31:10 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-24 06:08:06 -0500 |
| commit | d737f8e95da3aabb73cc60085cdbad9c05600f48 (patch) | |
| tree | 6d2b7cfc55eca3815fe51284f7cd91d1ada11f58 /src/sbefw/core/sbecmdsram.C | |
| parent | 9b03db45c424d6edc5698fa74830dc1d432fdfe8 (diff) | |
| download | talos-sbe-d737f8e95da3aabb73cc60085cdbad9c05600f48.tar.gz talos-sbe-d737f8e95da3aabb73cc60085cdbad9c05600f48.zip | |
Allow read on complete OCC SRAM buffer
Change-Id: Ife2f4a321753f6367e2cfa0ee9fd3804a4d8d52a
CQ: FW672705
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52499
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/sbefw/core/sbecmdsram.C')
| -rw-r--r-- | src/sbefw/core/sbecmdsram.C | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/sbefw/core/sbecmdsram.C b/src/sbefw/core/sbecmdsram.C index ce05f7f6..0a57dca8 100644 --- a/src/sbefw/core/sbecmdsram.C +++ b/src/sbefw/core/sbecmdsram.C @@ -5,7 +5,8 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ @@ -135,7 +136,8 @@ uint32_t sbeOccSramAccess_Wrap(const bool i_isGetFlag) } CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); // Check if the access to the address is allowed - if(l_validAddrForFirstAccess) + // For read access no checking is required + if( (l_validAddrForFirstAccess) && !( i_isGetFlag )) { l_respHdr.secondaryStatus = occSramSecRegionManager.isAccessAllowed( {static_cast<uint64_t>(l_req.addr)&(0x00000000FFFFFFFFull), |
