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| author | Joe Dery <dery@us.ibm.com> | 2017-02-27 16:11:58 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-03-14 05:43:50 -0400 |
| commit | a4ef2a0d2adcec818ff5aeaa12a7eece75fdd5e7 (patch) | |
| tree | 8e39c6474bf1e65fcd8f3209c2e5a85b9c68ec40 /src/import | |
| parent | aeb2f09ac1d4d80426d7c1d1c194f220b1f683fe (diff) | |
| download | talos-sbe-a4ef2a0d2adcec818ff5aeaa12a7eece75fdd5e7.tar.gz talos-sbe-a4ef2a0d2adcec818ff5aeaa12a7eece75fdd5e7.zip | |
tp/nest reset: add INEX scan type in non-gptr/time/repr scan0 operation
reduce X states to improve LBIST stability
Change-Id: I5f62f19e88a3701f2677ec43e0994aed7854a3ec
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37121
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Dev-Ready: Joseph E. Dery <dery@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37131
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H | 2 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H index 990a01e9..d34e3780 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H @@ -84,7 +84,7 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants HANG_PULSE_0X1A = 0x1A, NET_CNTL1_HW_INIT_VALUE = 0x7200000000000000ull, REGIONS_EXCEPT_VITAL = 0x7FF, - SCAN_TYPES_EXCEPT_TIME_GPTR_REPR = 0xDCE, + SCAN_TYPES_EXCEPT_TIME_GPTR_REPR = 0xDCF, SCAN_TYPES_TIME_GPTR_REPR = 0x230, SCAN_RATIO_0X0 = 0x0, SYNC_CONFIG_4TO1 = 0X0800000000000000, diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C index 2d445870..4669fecd 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init1.C @@ -45,7 +45,7 @@ enum P9_SBE_TP_CHIPLET_INIT1_Private_Constants { - SCAN_TYPES_EXCEPT_TIME_GPTR_REPR = 0xDCE, + SCAN_TYPES_EXCEPT_TIME_GPTR_REPR = 0xDCF, REGIONS_EXCEPT_VITAL_PIB_NET = 0x4FF, // Regions excluding VITAL, PIB and NET SCAN_TYPES_TIME_GPTR_REPR = 0x230 }; |
