diff options
| author | Soma BhanuTej <soma.bhanu@in.ibm.com> | 2017-03-10 02:25:10 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-03-14 05:43:33 -0400 |
| commit | aeb2f09ac1d4d80426d7c1d1c194f220b1f683fe (patch) | |
| tree | 4f27c9f0aa4a7474624dae4e7891d77480604eda /src/import | |
| parent | eb3edaac057e7c44a2e5649a89f2a6bf72fd4a37 (diff) | |
| download | talos-sbe-aeb2f09ac1d4d80426d7c1d1c194f220b1f683fe.tar.gz talos-sbe-aeb2f09ac1d4d80426d7c1d1c194f220b1f683fe.zip | |
Adding cfam fences to p9_tp_stopclocks
Clear abistclk_muxsel in p9_common_stopclks
Change-Id: I8962bd127bea7e0133c4732aef4c9b032df2f1af
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37782
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37783
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C | 11 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C | 17 |
2 files changed, 23 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C index a62278e9..8d1c223e 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C @@ -56,7 +56,7 @@ enum P9_common_stopclocks_Private_Constants }; /// @brief --Raise partial good fences -/// --set abstclk muxsel,syncclk_muxsel +/// --Clear abstclk muxsel & Set syncclk_muxsel /// /// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target /// @return FAPI2_RC_SUCCESS if success, else error code. @@ -83,8 +83,13 @@ fapi2::ReturnCode p9_common_stopclocks_cplt_ctrl_action_function( l_data64.insertFromRight<4, 11>(l_cplt_ctrl_init); FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL1_OR, l_data64)); - FAPI_DBG("set syncclk_muxsel"); - //Setting CPLT_CTRL0 register value + FAPI_DBG("Clear abistclk_muxsel"); + l_data64.flush<0>(); + //CPLT_CTRL0.CTRL_CC_ABSTCLK_MUXSEL_DC = 0 + l_data64.setBit<PERV_1_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC>(); + FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_CPLT_CTRL0_CLEAR, l_data64)); + + FAPI_DBG("Set syncclk_muxsel"); l_data64.flush<0>(); //CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 1 l_data64.setBit<PERV_1_CPLT_CTRL0_TC_UNIT_SYNCCLK_MUXSEL_DC>(); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C index 3df6e743..d0cdc2e2 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C @@ -152,14 +152,27 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C if(i_stop_pib_clks) { - FAPI_INF("p9_tp_stopclocks: Raise OOB Mux"); + FAPI_DBG("p9_tp_stopclocks: Assert CFAM fences"); + //Setting ROOT_CTRL0 register + //CFAM.ROOT_CTRL0.FENCE[0..6]_DC = 1 + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE0_DC>(); + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE1_DC>(); + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE2_DC>(); + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE3_DC>(); + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE4_DC>(); + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE5_DC>(); + l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE6_DC>(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, + l_data32_root_ctrl0)); + + FAPI_DBG("p9_tp_stopclocks: Raise OOB Mux"); //Setting ROOT_CTRL0 register value //CFAM.ROOT_CTRL0.OOB_MUX = 1 l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_OOB_MUX>(); FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - FAPI_INF("p9_tp_stopclocks: Raise Global Endpoint reset"); + FAPI_DBG("p9_tp_stopclocks: Raise Global Endpoint reset"); //Setting ROOT_CTRL0 register value //CFAM.ROOT_CTRL0.GLOBAL_EP_RESET_DC = 1 l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_GLOBAL_EP_RESET_DC>(); |
