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author | Nick Klazynski <jklazyns@us.ibm.com> | 2017-02-07 15:13:28 -0600 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-02-15 09:13:52 -0500 |
commit | e149d1d9ab70cdfa95bfc8128aecbff7e98a2def (patch) | |
tree | c5a9be6635533b9bc0cd2dc9901e9516cb0e6714 /src/import/chips/p9 | |
parent | a58e1cc782ebceef95083007bb33078a7108bc0f (diff) | |
download | talos-sbe-e149d1d9ab70cdfa95bfc8128aecbff7e98a2def.tar.gz talos-sbe-e149d1d9ab70cdfa95bfc8128aecbff7e98a2def.zip |
WAs for HW401811 HW402145 HW403465; DIS_MULTIPLE_TBLW on all modes
Change-Id: I6a6803cc0f3571d41ae3e5fa501b89609b88d525
CQ: HW401811
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36063
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36151
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 55 |
1 files changed, 53 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index d2225a41..8c9a65c0 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -1971,6 +1971,23 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW401811</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1: Silly Plutonium + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW400898</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -2020,7 +2037,7 @@ </chip> </chipEcFeature> </attribute> - + <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_HW363780</id>> <targetType>TARGET_TYPE_PROC_CHIP</targetType> @@ -2038,7 +2055,41 @@ </chip> </chipEcFeature> </attribute> - + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW403465</id>> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1: L1 access latency increases when data footprint should still + be within L1 cache size. Revert L1 LRU changes + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW402145</id>> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1: Husky Dinosaur + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> <!-- ******************************************************************** --> <!-- Memory Section --> <!-- ******************************************************************** --> |