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author | Joe McGill <jmcgill@us.ibm.com> | 2019-06-02 11:19:27 -0400 |
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committer | RAJA DAS <rajadas2@in.ibm.com> | 2019-06-14 08:04:32 -0500 |
commit | 582a724a0172c491f2c7244f48ecd1e838cf1cf8 (patch) | |
tree | f2c7ac71579140826db224abd3c21dd79343e4f4 /src/import/chips/p9 | |
parent | e9bc6a014a078762a4b804d5030829fd9165d1f6 (diff) | |
download | talos-sbe-582a724a0172c491f2c7244f48ecd1e838cf1cf8.tar.gz talos-sbe-582a724a0172c491f2c7244f48ecd1e838cf1cf8.zip |
p9_sbe_npll_setup -- update SS enablement for p9a
Axone has two spread PLLs that can individually synchronized, so the
TOD timer facility grew two enable bits. Set both of them to
synchronize both PLLs at the same time. The enable bits are don't
care on Nimbus/Cumulus so the procedure will still work the same
way there.
Check only the status of one PLL, knowing that if both are enabled,
either both or none will get started by the TOD. This maintains
Nimbus/Cumulus compatibility on the checking part.
Change-Id: Ife3a5164037362f1c392146bd7e27ef69bb1a0cd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78221
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78230
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C index 15e6968e..01682aeb 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C @@ -378,6 +378,7 @@ static fapi2::ReturnCode enable_spread_spectrum_via_tod( // Set up the TOD timer unit to trigger on a TOD value of one l_data.flush<0>().insertFromRight<PERV_TOD_TIMER_REG_VALUE, PERV_TOD_TIMER_REG_VALUE_LEN>(1ULL); + l_data.setBit<60>().setBit<61>(); FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_TIMER_REG, l_data)); // Reset the TOD and set it to a value of one to trigger the timer |