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| author | Andre Marin <aamarin@us.ibm.com> | 2017-09-05 11:04:23 -0500 |
|---|---|---|
| committer | spashabk-in <shakeebbk@in.ibm.com> | 2017-09-12 00:19:31 -0500 |
| commit | f0d4e05bfbbee8bf31dafd5cf9be745ebb91dfbc (patch) | |
| tree | 5068a55ea9cba9f705c0317f84130ea467d3ea1c /src/import/chips/p9/procedures | |
| parent | 306dcd7b26d7391c388257140eeff6eb58518426 (diff) | |
| download | talos-sbe-f0d4e05bfbbee8bf31dafd5cf9be745ebb91dfbc.tar.gz talos-sbe-f0d4e05bfbbee8bf31dafd5cf9be745ebb91dfbc.zip | |
Remove logic to disable memory clocks in STR if in PD_AND_STR_CLK_STOP mode
Do not disable memory clocks when in STR if power control mode
PD_AND_STR_CLK_STOP (ie. treat it the same as PD_AND_STR).
Removing EC Chip level check since there isn't a current plan
for a RIT fix.
Change-Id: I298561c39a2419ed7f92e90c9eeaf8924fc412bc
CQ:HW416315
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45653
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index de494390..c903ae29 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -4310,24 +4310,6 @@ </attribute> <attribute> - <id>ATTR_CHIP_EC_FEATURE_MSS_DIS_CLK_IN_STR</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Only set the disable memory clock stop when in STR for DD2.* - Doesn't work for DD1.* - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>LESS_THAN</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - - <attribute> <id>ATTR_CHIP_EC_FEATURE_MSS_PERIODICS</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |
