From f0d4e05bfbbee8bf31dafd5cf9be745ebb91dfbc Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Tue, 5 Sep 2017 11:04:23 -0500 Subject: Remove logic to disable memory clocks in STR if in PD_AND_STR_CLK_STOP mode Do not disable memory clocks when in STR if power control mode PD_AND_STR_CLK_STOP (ie. treat it the same as PD_AND_STR). Removing EC Chip level check since there isn't a current plan for a RIT fix. Change-Id: I298561c39a2419ed7f92e90c9eeaf8924fc412bc CQ:HW416315 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45653 Tested-by: FSP CI Jenkins Reviewed-by: Michael D. Pardeik Tested-by: Jenkins Server Reviewed-by: JACOB L. HARVEY Tested-by: Hostboot CI Reviewed-by: STEPHEN GLANCY Reviewed-by: Louis Stermole Reviewed-by: Matt K. Light Reviewed-by: Daniel M. Crowell Reviewed-by: Jennifer A. Stofer --- .../xml/attribute_info/chip_ec_attributes.xml | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'src/import/chips/p9/procedures') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index de494390..c903ae29 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -4309,24 +4309,6 @@ - - ATTR_CHIP_EC_FEATURE_MSS_DIS_CLK_IN_STR - TARGET_TYPE_PROC_CHIP - - Only set the disable memory clock stop when in STR for DD2.* - Doesn't work for DD1.* - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - LESS_THAN - - - - - ATTR_CHIP_EC_FEATURE_MSS_PERIODICS TARGET_TYPE_PROC_CHIP -- cgit v1.2.1