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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2018-02-21 09:31:25 +0100 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-07-02 06:15:33 -0400 |
| commit | a8686c27d27e85e65fabea3af914e975ee8de509 (patch) | |
| tree | 29e4b489e7cc894d99427a88227eb457506469c6 /src/import/chips/p9/procedures/xml/error_info | |
| parent | c6fdb271fa1a9d1bebf6e78983c319eaf18d90b4 (diff) | |
| download | talos-sbe-a8686c27d27e85e65fabea3af914e975ee8de509.tar.gz talos-sbe-a8686c27d27e85e65fabea3af914e975ee8de509.zip | |
p9_sbe_lpc_init: Add final check for errors
Add an external FFDC collection procedure that will dump the LPC
register spaces, make sure it is called if after LPC setup an OPB
error is registered.
Change-Id: I91046a6a3814ba94abd878f860e08f1b1338390b
CQ: SW435433
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57803
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60994
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/error_info')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_sbe_lpc_init_errors.xml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_lpc_init_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_lpc_init_errors.xml index 1668a29e..71c2bff8 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_lpc_init_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_lpc_init_errors.xml @@ -45,4 +45,29 @@ <target>TARGET_CHIP</target> </deconfigure> </hwpError> + <hwpError> + <sbeError/> + <rc>RC_LPC_OPB_ERROR</rc> + <description>After LPC initialization, the OPB master indicated an error.</description> + <collectFfdc>p9_collect_lpc_regs, FFDC_TARGET_CHIP</collectFfdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>TARGET_CHIP</target> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>TARGET_CHIP</target> + </deconfigure> + </hwpError> + <hwpError> + <rc>RC_LPC_REGISTERS</rc> + <description>LPC register dump</description> + <buffer>OPB_MST_REGS</buffer> + <buffer>OPB_ARB_REGS</buffer> + <buffer>LPC_HC_REGS</buffer> + </hwpError> </hwpErrors> |
