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author | Shakeeb <shakeebbk@in.ibm.com> | 2016-09-01 06:24:44 -0500 |
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committer | AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> | 2016-09-01 07:48:28 -0400 |
commit | 5e83bcb5cf9d400739cfb2beaab1a3173e8cafb2 (patch) | |
tree | b3d6cd12b5eb0c92404ae5ac0352bb360b38fa95 /src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml | |
parent | 1008ef70a71fcfdec398ff30923d5025991c85f4 (diff) | |
download | talos-sbe-5e83bcb5cf9d400739cfb2beaab1a3173e8cafb2.tar.gz talos-sbe-5e83bcb5cf9d400739cfb2beaab1a3173e8cafb2.zip |
SBE move import`
Change-Id: I726951318cdb19fd445af2f7910e0d6872eff18c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29086
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml | 147 |
1 files changed, 147 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml new file mode 100644 index 00000000..715538a4 --- /dev/null +++ b/src/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml @@ -0,0 +1,147 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml $ --> +<!-- --> +<!-- OpenPOWER sbe Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2015,2016 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- @brief Error definitions for p9_thread_control procedure --> +<hwpErrors> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_SRESET_PRE_FAIL</rc> + <description>SReset command precondition not met: Not all threads are running.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_SRESET_FAIL</rc> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <description>SReset command failed: Not all threads are running after sreset command.</description> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>CORE_TARGET</target> + </deconfigure> + <gard> + <target>CORE_TARGET</target> + </gard> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_START_PRE_NOMAINT</rc> + <description>Start command precondition not met: RAS STAT Maintenance bit is not set.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_START_FAIL</rc> + <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING</rc> + <description>Stop command precondition not met: Not all threads are running.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_STOP_FAIL</rc> + <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_STEP_PRE_NOTSTOPPING</rc> + <description>Step command precondition not met: Not all threads are stopped.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <sbeError/> + <rc>RC_P9_THREAD_CONTROL_STEP_FAIL</rc> + <description>Step command issued to core PC, but RAS STAT run bit is still set.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <ffdc>PTC_STEP_COMP_POLL_LIMIT</ffdc> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + </hwpError> + +</hwpErrors> |