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authorGreg Still <stillgs@us.ibm.com>2016-02-08 06:53:08 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2016-09-16 08:31:52 -0400
commit02151adfbb7b275fd20e794bb5c1d98ba597cb47 (patch)
tree5b7c07ec758a11d10dbe4d29745dd81985476411 /src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
parentece97c0ee59eba8efa66aafe782b4a07c0de566a (diff)
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Level 2 p9_cpu_special_wakeup
- Restructured to deal with individual core, EQ and EQ targets This is necessary as compound targets really can't apply to this procedure as the registers being addressed for an EX target changes based on Fused mode. - The above moved the main implemented into p9_cpu_special_wakeup_lib - Removed tracking attributes - Removed FUSED CORE support - EX targets will wake-up up to 2 cores within the EX (dependent on functionality) - Added SUET support - Rebased (2) - Made HWP attributes writable - Added HB platform defaults in hb_temp_defaults.xml (but doesn't compile) - Address Gerrit comments (included Cronus noticed bug) - Removed some hb_temp attributes to deal with HB Jenkins fails Change-Id: I84a66b646477627f0178c3c968580ffc435b5300 RTC: 136795 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20850 Dev-Ready: Matt K. Light <mklight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21027 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml')
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