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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-08-16 16:53:33 -0500 |
|---|---|---|
| committer | spashabk-in <shakeebbk@in.ibm.com> | 2017-09-12 00:19:04 -0500 |
| commit | 97617be09a852e0ae476f036eb23fdccb9c7eaa6 (patch) | |
| tree | 70e7c99246da31962746e45b762994b1f5b22f33 /src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | |
| parent | b6fa4d1b8ab47fdca64945895a2a80133dc22acb (diff) | |
| download | talos-sbe-97617be09a852e0ae476f036eb23fdccb9c7eaa6.tar.gz talos-sbe-97617be09a852e0ae476f036eb23fdccb9c7eaa6.zip | |
resolve Zeppelin DMI channel framelock issues
p9_sbe_chiplet_reset
p9c_mc_scom
resolve HW CQ 418671
set MC CPLT_CONF1 FASTX2 ratio controls in p9_sbe_chiplet_reset
need to set prior to MC chiplet clock start for proper functional operation
remove from initfile
p9_cen_framelock
resolve HW CQ 418901
analyze captured FRTL value along with FRTL counter overflow error FIR
centaur.mcs.scan.initfile
cen_scominits
enable MBI trace array prior to framelock, to make usable for future debug
Update p9c.mc.initfile to include fix for ZCAL to help with conflicts - bgass
Change-Id: I7897d41250b9c113adf22fe40a8ca5971bca2a6f
CQ: HW418671
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44708
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index c44cf6a0..7565cb68 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -4526,6 +4526,24 @@ <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW418091</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Adjust FRTL latency overflow check for HW418091 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW355538</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |
