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author | Joe McGill <jmcgill@us.ibm.com> | 2018-07-11 09:14:59 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-07-12 01:40:34 -0400 |
commit | 8dcb329eeac4b06b711c637ed589d05ed8c0861c (patch) | |
tree | c2bb0129fe49918bc7283a638d7f8aa436735fb0 /src/import/chips/p9/procedures/hwp | |
parent | b725244e84ae48c9d0e50c91eaddcd9cdf29462e (diff) | |
download | talos-sbe-8dcb329eeac4b06b711c637ed589d05ed8c0861c.tar.gz talos-sbe-8dcb329eeac4b06b711c637ed589d05ed8c0861c.zip |
p9_sbe_check_quiesce -- restore call to p9_int_scrub_caches
52512 removed code related to the DD1 SW based INT reset sequence, to leave
only the HW based reset in production code for DD2 and beyond. It also
erroneously removed the call to/code for p9_int_scrub_caches.
This commit restores the subroutine, and invokes it prior to the HW
quiesce/sync reset into order to scrub/flush the EQC, VPC, IVC, and SBC caches.
Change-Id: I051117e3a18c55aea7267e53eea1652f0cff9790
CQ: SW431898
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62227
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62243
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C | 44 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H | 6 |
2 files changed, 50 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C index 09305f92..a4296742 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C @@ -776,6 +776,9 @@ extern "C" { FAPI_DBG("p9_intp_check_quiesce: Entering..."); fapi2::buffer<uint64_t> l_data(0); + //Start the scrub operation in all caches andPoll for completion + FAPI_TRY(p9_int_scrub_caches(i_target), "Error scrubbing the caches"); + // Read INT_CQ_RST_CTL so that we don't override anything FAPI_TRY(fapi2::getScom(i_target, PU_INT_CQ_RST_CTL, l_data)); @@ -812,6 +815,47 @@ extern "C" { return fapi2::current_err; } + //--------------------------------------------------------------------------------- + // NOTE: description in header + //--------------------------------------------------------------------------------- + fapi2::ReturnCode p9_int_scrub_caches( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) + { + fapi2::buffer<uint64_t> l_scrub_trig_data(0); + const uint64_t l_scrub_addrs[4] = + { + PU_INT_PC_VPC_SCRUB_TRIG, PU_INT_VC_SBC_SCRUB_TRIG, + PU_INT_VC_EQC_SCRUB_TRIG, PU_INT_VC_IVC_SCRUB_TRIG + }; + + //Start the scrub operation in all caches + for (uint32_t i = 0; i < 4; i++) + { + fapi2::putScom(i_target, l_scrub_addrs[i], 0xA000000000000000); + + for (uint32_t j = 0; j < C_NUM_TRIES_QUIESCE_STATE; j++) + { + FAPI_TRY(fapi2::delay(C_INTP_DELAY_NS, C_INTP_DELAY_CYCLES)); + FAPI_TRY(fapi2::getScom(i_target, l_scrub_addrs[i], l_scrub_trig_data)); + + if (!l_scrub_trig_data.getBit<0>()) + { + break; + } + } + + FAPI_ASSERT(!l_scrub_trig_data.getBit<0>(), + fapi2::P9_INT_SCRUB_NOT_FINISHED_ERR() + .set_TARGET(i_target) + .set_ADDRESS(l_scrub_addrs[i]) + .set_DATA(l_scrub_trig_data), + "INT scrub operation still busy"); + } + + fapi_try_exit: + return fapi2::current_err; + } + fapi2::ReturnCode p9_pm_check_quiesce(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) { // Bit-13 used to set WAKEUP_NOTIFY_SELECT bit on the Core Power Management Mode Reg diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H index 4090d4ed..9d6e46c2 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H @@ -124,6 +124,12 @@ extern "C" { fapi2::ReturnCode p9_pm_check_quiesce( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target); + /// @brief Helper function to scrub all the caches for Int + /// @param[in] i_target => P9 chip target + /// @return FAPI_RC_SUCCESS if the scrube completes successfully + fapi2::ReturnCode p9_int_scrub_caches( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target); + } //extern "C" #endif //_P9_SBE_CHECK_QUIESCE_H_ |