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authorJoe McGill <jmcgill@us.ibm.com>2018-07-09 11:29:41 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2018-07-10 21:23:56 -0400
commitb725244e84ae48c9d0e50c91eaddcd9cdf29462e (patch)
tree893624d161270bc6a606891a2b562a45cc6a8e38 /src/import/chips/p9/procedures/hwp
parentadd228241007583d01c4b92db89688fd465c0b0c (diff)
downloadtalos-sbe-b725244e84ae48c9d0e50c91eaddcd9cdf29462e.tar.gz
talos-sbe-b725244e84ae48c9d0e50c91eaddcd9cdf29462e.zip
set PEC disable store thread based ordering chicken switches
Change-Id: I2d9aed7833a1bf43c797689d50ff32794ef54cff CQ: SW430383 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62028 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62042 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C107
1 files changed, 106 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
index a5ada5b3..75be02a8 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -43,6 +43,108 @@
#include "p9_const_common.H"
#include <p9_ring_id.h>
+fapi2::ReturnCode
+p9_sbe_nest_initf_sw430383_wa(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ FAPI_DBG("Start");
+
+ fapi2::ATTR_CHIP_EC_FEATURE_SW430383_Type l_sw430383;
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SW430383,
+ i_target,
+ l_sw430383),
+ "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_SW430383");
+
+ if (l_sw430383)
+ {
+ fapi2::buffer<uint64_t> l_scan_region;
+ fapi2::buffer<uint64_t> l_scan_data;
+
+ // ring:
+ // n2_fure 0x04035C0F 96269 N Y Y Y NESTN2 OFF
+ //
+ // bits to set:
+ // 1 4083 92185 0 PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
+ // 1 45823 50445 0 PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
+ // 1 70000 26268 0 PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
+
+ // inject header
+ l_scan_region.setBit<PERV_1_SCAN_REGION_TYPE_PERV>(). // PERV
+ setBit<PERV_1_SCAN_REGION_TYPE_UNIT2>(). // PCIS0
+ setBit<PERV_1_SCAN_REGION_TYPE_UNIT3>(). // PCIS1
+ setBit<PERV_1_SCAN_REGION_TYPE_UNIT4>(). // PCIS2
+ setBit<PERV_1_SCAN_REGION_TYPE_FUNC>(). // FUNC
+ setBit<PERV_1_SCAN_REGION_TYPE_REGF>(); // REGF
+ FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN_REGION_TYPE, l_scan_region));
+ l_scan_data = 0xA5A5A5A5A5A5A5A5;
+ FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));
+
+ // scan 0..4083 (37*110 + 13)
+ for (auto ii = 0; ii < 37; ii++)
+ {
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
+ }
+
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x0D, l_scan_data));
+
+ // flip PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2
+ FAPI_DBG("Flip PE2.PB2.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2");
+ l_scan_data.setBit<0>();
+ FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));
+
+ // scan 4083..45823 (379*110 + 50)
+ for (auto ii = 0; ii < 379; ii++)
+ {
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
+ }
+
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x32, l_scan_data));
+
+ // flip PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
+ FAPI_DBG("Flip PE1.PB1.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)");
+ l_scan_data.setBit<0>();
+ FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));
+
+ // scan 45823..70000 (219*110 + 87)
+ for (auto ii = 0; ii < 219; ii++)
+ {
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
+ }
+
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x57, l_scan_data));
+
+ // flip PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)
+ FAPI_DBG("Flip PE0.PB0.PBCQ.PELDST.SPARE_LAT.SPARE_0.LATC.L2(0)");
+ l_scan_data.setBit<0>();
+ FAPI_TRY(fapi2::putScom(i_target, PERV_N2_SCAN32, l_scan_data));
+
+ // scan 70000..96269 (238*110 + 89)
+ for (auto ii = 0; ii < 238; ii++)
+ {
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x6E, l_scan_data));
+ }
+
+ FAPI_TRY(fapi2::getScom(i_target, PERV_N2_SCAN32 + 0x59, l_scan_data));
+
+ // check header
+ FAPI_ASSERT((l_scan_data == 0xA5A5A5A5A5A5A5A5),
+ fapi2::P9_PUTRING_CHECKWORD_DATA_MISMATCH().
+ set_TARGET(i_target).
+ set_CHIPLET_ID(0x02).
+ set_SCOM_ADDRESS(PERV_N2_SCAN32).
+ set_SCOM_DATA(l_scan_data()).
+ set_BITS_DECODED(0).
+ set_RINGID(n2_fure).
+ set_RINGMODE(fapi2::RING_MODE_HEADER_CHECK).
+ set_RETURN_CODE(0),
+ "Error rotating n2_fure for sw430383");
+ }
+
+fapi_try_exit:
+ FAPI_DBG("End");
+ return fapi2::current_err;
+}
+
+
fapi2::ReturnCode p9_sbe_nest_initf(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
@@ -150,6 +252,9 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
FAPI_TRY(fapi2::putRing(i_target_chip, n2_fure),
"Error from putRing (n2_fure)");
+ FAPI_TRY(p9_sbe_nest_initf_sw430383_wa(i_target_chip),
+ "Error from p9_sbe_nest_initf_sw430383_wa");
+
if (!l_read_attr.getBit<9>()) //Check iopsi is enable
{
FAPI_DBG("Scan n2_psi_fure ring");
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