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author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-06-01 15:22:57 +0200 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-06-19 15:44:17 -0400 |
commit | 0f538b516cf62ac44d2ebfb160568d54b3bf0e85 (patch) | |
tree | 74d166229114bc1074a4bbe908b6888d346eda60 /src/import/chips/p9/procedures/hwp/perv | |
parent | cf7b3f781f41a3891e6af34a11c5e1d64e303c20 (diff) | |
download | talos-sbe-0f538b516cf62ac44d2ebfb160568d54b3bf0e85.tar.gz talos-sbe-0f538b516cf62ac44d2ebfb160568d54b3bf0e85.zip |
p9_sbe_tracearray: Level 3
Change-Id: I9ffdb6ba9684f2fb0df5377cfe70a962736a9c5f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41240
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41265
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C | 67 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H | 2 |
2 files changed, 33 insertions, 36 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C index 8502501c..b5e6db48 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C @@ -168,13 +168,14 @@ struct ta_def class TraceArrayFinder { public: + bool valid; uint32_t mux_sel; uint32_t debug_scom_base; uint32_t trace_scom_base; uint32_t ex_odd_scom_offset; TraceArrayFinder(p9_tracearray_bus_id i_trace_bus) : - mux_sel(0), debug_scom_base(0), + valid(false), mux_sel(0), debug_scom_base(0), trace_scom_base(0), ex_odd_scom_offset(0) { for(auto& l_ta_def : ta_defs) @@ -193,6 +194,7 @@ class TraceArrayFinder l_ta_def.base_multiplier); ex_odd_scom_offset = l_ta_def.ex_odd_scom_offset; mux_sel = sel; + valid = true; return; } } @@ -226,23 +228,27 @@ fapi2::ReturnCode p9_sbe_tracearray( uint32_t tra_scom_offset = 0; uint32_t l_proc_offset = 0; - if ((arg_type & ta_type) == 0) - { - FAPI_ERR("Specified trace array requires target type 0x%X, " - "but the supplied target is of type 0x%X", ta_type, arg_type); - return fapi2::RC_PROC_GETTRACEARRAY_INVALID_TARGET; - } + FAPI_ASSERT(l_ta_finder.valid, fapi2::PROC_GETTRACEARRAY_INVALID_BUS() + .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus), + "Invalid trace bus specified: 0x%X", i_args.trace_bus); - /* There is no support for OBUS and MCBIST on SBE. - * These are passed as PERV targets, but have to be converted to - * PROC with manual address offset for chiplet, as trace scoms - * are not allowed for PERV targets in Cronus */ - const uint8_t l_chiplet_num = i_target.getChipletNumber(); + FAPI_ASSERT((arg_type & ta_type) != 0, fapi2::PROC_GETTRACEARRAY_INVALID_TARGET() + .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus).set_REQUIRED_TYPE(ta_type), + "Specified trace bus requires target type 0x%X, but the supplied target is of type 0x%X", + ta_type, arg_type); - if(IS_MCBIST(l_chiplet_num) || IS_OBUS(l_chiplet_num)) { - target = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); - l_proc_offset = (l_chiplet_num << 24) - (TRACE_SCOM_BASE & 0xFF000000); + /* There is no support for OBUS and MCBIST on SBE. + * These are passed as PERV targets, but have to be converted to + * PROC with manual address offset for chiplet, as trace scoms + * are not allowed for PERV targets in Cronus */ + const uint8_t l_chiplet_num = i_target.getChipletNumber(); + + if(IS_MCBIST(l_chiplet_num) || IS_OBUS(l_chiplet_num)) + { + target = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); + l_proc_offset = (l_chiplet_num << 24) - (TRACE_SCOM_BASE & 0xFF000000); + } } /* Nimbus DD1 core traces can't be read out via SCOM. @@ -258,12 +264,9 @@ fapi2::ReturnCode p9_sbe_tracearray( "Failed to query chip EC feature " "ATTR_CHIP_EC_FEATURE_CORE_TRACE_NOT_SCOMABLE"); - if (l_core_trace_not_scomable) - { - FAPI_ERR("Core arrays cannot be dumped in this chip EC; " - "please use fastarray instead."); - return fapi2::RC_PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE; - } + FAPI_ASSERT(!l_core_trace_not_scomable, fapi2::PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE() + .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus), + "Core arrays cannot be dumped in this chip EC; please use fastarray instead."); } /* For convenience, we link Cache trace arrays to the virtual EX chiplets. @@ -304,13 +307,10 @@ fapi2::ReturnCode p9_sbe_tracearray( uint32_t cur_sel = 0; buf.extractToRight<TRCTRL_MUX0_SEL, TRCTRL_MUX0_SEL_LEN>(cur_sel); - if (cur_sel != l_ta_finder.mux_sel) - { - FAPI_ERR("Primary trace mux is set to %d," - " but %d is needed for requested trace bus", - cur_sel, l_ta_finder.mux_sel); - return fapi2::RC_PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT; - } + FAPI_ASSERT(cur_sel == l_ta_finder.mux_sel, fapi2::PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT() + .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus).set_MUX_SELECT(cur_sel), + "Primary trace mux is set to %d, but %d is needed for requested trace bus", + cur_sel, l_ta_finder.mux_sel); } /* If control is requested along with dump, pre dump condition @@ -347,13 +347,10 @@ fapi2::ReturnCode p9_sbe_tracearray( * the array is currently running. * If it is, the read won't have incremented the address, * so it's okay to bail out. */ - if (buf.getBit<TRACE_LO_DATA_RUNNING>()) - { - FAPI_ERR("Trace array is still running --" - " If you think you stopped it, maybe the controlling " - "debug macro is slaved to another debug macro?"); - return fapi2::RC_PROC_GETTRACEARRAY_TRACE_RUNNING; - } + FAPI_ASSERT(!buf.getBit<TRACE_LO_DATA_RUNNING>(), fapi2::PROC_GETTRACEARRAY_TRACE_RUNNING() + .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus), + "Trace array is still running -- If you think you stopped it, " + "maybe the controlling debug macro is slaved to another debug macro?"); *(o_ta_data + (2 * i + 1)) = buf; } diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H index 17a47185..b1ffa9ce 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H @@ -43,7 +43,7 @@ // *HWP HW Backup Owner : Joe McGill <jmcgill@us.ibm.com> // *HWP FW Owner : Shakeeb Pasha<shakeebbk@in.ibm.com> // *HWP Team : Perv -// *HWP Level : 2 +// *HWP Level : 3 // *HWP Consumed by : Conus, SBE //------------------------------------------------------------------------------ |