p9_sbe_tracearray: Level 3

Change-Id: I9ffdb6ba9684f2fb0df5377cfe70a962736a9c5f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41240
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41265
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

4 files changed, 68 insertions, 39 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C
index 8502501c..b5e6db48 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C
@@ -168,13 +168,14 @@ struct ta_def
 class TraceArrayFinder
 {
     public:
+        bool valid;
         uint32_t mux_sel;
         uint32_t debug_scom_base;
         uint32_t trace_scom_base;
         uint32_t ex_odd_scom_offset;
 
         TraceArrayFinder(p9_tracearray_bus_id i_trace_bus) :
-            mux_sel(0), debug_scom_base(0),
+            valid(false), mux_sel(0), debug_scom_base(0),
             trace_scom_base(0), ex_odd_scom_offset(0)
         {
             for(auto& l_ta_def : ta_defs)
@@ -193,6 +194,7 @@ class TraceArrayFinder
                                            l_ta_def.base_multiplier);
                         ex_odd_scom_offset = l_ta_def.ex_odd_scom_offset;
                         mux_sel = sel;
+                        valid = true;
                         return;
                     }
                 }
@@ -226,23 +228,27 @@ fapi2::ReturnCode p9_sbe_tracearray(
     uint32_t tra_scom_offset = 0;
     uint32_t l_proc_offset = 0;
 
-    if ((arg_type & ta_type) == 0)
-    {
-        FAPI_ERR("Specified trace array requires target type 0x%X, "
-                 "but the supplied target is of type 0x%X", ta_type, arg_type);
-        return fapi2::RC_PROC_GETTRACEARRAY_INVALID_TARGET;
-    }
+    FAPI_ASSERT(l_ta_finder.valid, fapi2::PROC_GETTRACEARRAY_INVALID_BUS()
+                .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus),
+                "Invalid trace bus specified: 0x%X", i_args.trace_bus);
 
-    /* There is no support for OBUS and MCBIST on SBE.
-     * These are passed as PERV targets, but have to be converted to
-     * PROC with manual address offset for chiplet, as trace scoms
-     * are not allowed for PERV targets in Cronus */
-    const uint8_t l_chiplet_num = i_target.getChipletNumber();
+    FAPI_ASSERT((arg_type & ta_type) != 0, fapi2::PROC_GETTRACEARRAY_INVALID_TARGET()
+                .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus).set_REQUIRED_TYPE(ta_type),
+                "Specified trace bus requires target type 0x%X, but the supplied target is of type 0x%X",
+                ta_type, arg_type);
 
-    if(IS_MCBIST(l_chiplet_num) || IS_OBUS(l_chiplet_num))
     {
-        target = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
-        l_proc_offset = (l_chiplet_num << 24) - (TRACE_SCOM_BASE & 0xFF000000);
+        /* There is no support for OBUS and MCBIST on SBE.
+         * These are passed as PERV targets, but have to be converted to
+         * PROC with manual address offset for chiplet, as trace scoms
+         * are not allowed for PERV targets in Cronus */
+        const uint8_t l_chiplet_num = i_target.getChipletNumber();
+
+        if(IS_MCBIST(l_chiplet_num) || IS_OBUS(l_chiplet_num))
+        {
+            target = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+            l_proc_offset = (l_chiplet_num << 24) - (TRACE_SCOM_BASE & 0xFF000000);
+        }
     }
 
     /* Nimbus DD1 core traces can't be read out via SCOM.
@@ -258,12 +264,9 @@ fapi2::ReturnCode p9_sbe_tracearray(
                  "Failed to query chip EC feature "
                  "ATTR_CHIP_EC_FEATURE_CORE_TRACE_NOT_SCOMABLE");
 
-        if (l_core_trace_not_scomable)
-        {
-            FAPI_ERR("Core arrays cannot be dumped in this chip EC; "
-                     "please use fastarray instead.");
-            return fapi2::RC_PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE;
-        }
+        FAPI_ASSERT(!l_core_trace_not_scomable, fapi2::PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE()
+                    .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus),
+                    "Core arrays cannot be dumped in this chip EC; please use fastarray instead.");
     }
 
     /* For convenience, we link Cache trace arrays to the virtual EX chiplets.
@@ -304,13 +307,10 @@ fapi2::ReturnCode p9_sbe_tracearray(
         uint32_t cur_sel = 0;
         buf.extractToRight<TRCTRL_MUX0_SEL, TRCTRL_MUX0_SEL_LEN>(cur_sel);
 
-        if (cur_sel != l_ta_finder.mux_sel)
-        {
-            FAPI_ERR("Primary trace mux is set to %d,"
-                     " but %d is needed for requested trace bus",
-                     cur_sel, l_ta_finder.mux_sel);
-            return fapi2::RC_PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT;
-        }
+        FAPI_ASSERT(cur_sel == l_ta_finder.mux_sel, fapi2::PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT()
+                    .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus).set_MUX_SELECT(cur_sel),
+                    "Primary trace mux is set to %d, but %d is needed for requested trace bus",
+                    cur_sel, l_ta_finder.mux_sel);
     }
 
     /* If control is requested along with dump, pre dump condition
@@ -347,13 +347,10 @@ fapi2::ReturnCode p9_sbe_tracearray(
              * the array is currently running.
              * If it is, the read won't have incremented the address,
              * so it's okay to bail out. */
-            if (buf.getBit<TRACE_LO_DATA_RUNNING>())
-            {
-                FAPI_ERR("Trace array is still running --"
-                         " If you think you stopped it, maybe the controlling "
-                         "debug macro is slaved to another debug macro?");
-                return fapi2::RC_PROC_GETTRACEARRAY_TRACE_RUNNING;
-            }
+            FAPI_ASSERT(!buf.getBit<TRACE_LO_DATA_RUNNING>(), fapi2::PROC_GETTRACEARRAY_TRACE_RUNNING()
+                        .set_TARGET(i_target).set_TRACE_BUS(i_args.trace_bus),
+                        "Trace array is still running -- If you think you stopped it, "
+                        "maybe the controlling debug macro is slaved to another debug macro?");
 
             *(o_ta_data + (2 * i + 1)) = buf;
         }
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H
index 17a47185..b1ffa9ce 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H
@@ -43,7 +43,7 @@
 // *HWP HW Backup Owner : Joe McGill <jmcgill@us.ibm.com>
 // *HWP FW Owner        : Shakeeb Pasha<shakeebbk@in.ibm.com>
 // *HWP Team            : Perv
-// *HWP Level           : 2
+// *HWP Level           : 3
 // *HWP Consumed by     : Conus, SBE
 //------------------------------------------------------------------------------
 
diff --git a/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk b/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk
index 7c1f42b8..d7d078a4 100644
--- a/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk
+++ b/src/import/chips/p9/procedures/xml/error_info/hwpErrors.mk
@@ -73,7 +73,7 @@ ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_l3_flush_errors.xml
 ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_sbe_check_quiesce_errors.xml
 ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_pm_pfet_control_errors.xml
 ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_hcd_cache_scominit_errors.xml
-ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_proc_gettracearray.xml
+ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_sbe_tracearray_errors.xml
 ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_hcd_cache_initf_errors.xml
 ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_quad_power_off_errors.xml
 ERROR_XML_FILES += $(PERV_CURR_DIR)/p9_fastarray.xml
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_proc_gettracearray.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tracearray_errors.xml
index 09cfd920..35a407ec 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_proc_gettracearray.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_tracearray_errors.xml
@@ -1,11 +1,11 @@
 <!-- IBM_PROLOG_BEGIN_TAG                                                   -->
 <!-- This is an automatically generated prolog.                             -->
 <!--                                                                        -->
-<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_proc_gettracearray.xml $ -->
+<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_sbe_tracearray_errors.xml $ -->
 <!--                                                                        -->
 <!-- OpenPOWER sbe Project                                                  -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2017                             -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -26,21 +26,53 @@
   <hwpError>
     <rc>RC_PROC_GETTRACEARRAY_INVALID_BUS</rc>
     <description>The specified trace bus ID is invalid.</description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>TRACE_BUS</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <hwpError>
     <rc>RC_PROC_GETTRACEARRAY_INVALID_TARGET</rc>
     <description>An invalid target type was supplied for the requested trace array.</description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>TRACE_BUS</ffdc>
+    <ffdc>REQUIRED_TYPE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <hwpError>
     <rc>RC_PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE</rc>
     <description>An attempt was made to dump a core trace array, but this chip's core cannot be dumped via SCOM.</description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>TRACE_BUS</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <hwpError>
     <rc>RC_PROC_GETTRACEARRAY_TRACE_RUNNING</rc>
     <description>An attempt was made to dump a trace array while it was still running.</description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>TRACE_BUS</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <hwpError>
     <rc>RC_PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT</rc>
     <description>The requested trace array's primary trace mux is not set up to capture the requested trace bus.</description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>TRACE_BUS</ffdc>
+    <ffdc>MUX_SELECT</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
 </hwpErrors>