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author | spashabk-in <shakeebbk@in.ibm.com> | 2016-11-21 05:24:49 -0600 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-11-22 01:34:46 -0500 |
commit | e748d4217fe114334533945a3a1f09e2b178d253 (patch) | |
tree | 9613a490d97e67a05b9c980f736862b9549fb5e8 /src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C | |
parent | 1f5d8da1131120bad452841435612c19afe4dae0 (diff) | |
download | talos-sbe-e748d4217fe114334533945a3a1f09e2b178d253.tar.gz talos-sbe-e748d4217fe114334533945a3a1f09e2b178d253.zip |
Change auto variables to references
Change-Id: I2b9c38757f89d23c627e4a8f2cb3b072bd3bc984
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32867
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32870
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C index e97ab652..40c9420b 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C @@ -129,7 +129,7 @@ extern "C" { //Block wake up on all cores l_gpmmr_data.setBit<C_BLOCK_ALL_WKUP_EVENTS>().setBit<C_BLOCK_REG_WKUP_EVENTS>(); - for (auto current_core : l_core_targets) + for (auto& current_core : l_core_targets) { //Stop the threads on each core FAPI_EXEC_HWP(l_rc, p9_thread_control, current_core, C_ALL_THREADS, PTC_CMD_STOP, l_thread_warncheck, l_ras_status, @@ -146,7 +146,7 @@ extern "C" { FAPI_TRY(fapi2::putScom(current_core, C_PPM_GPMMR_SCOM1, l_gpmmr_data), "Error writing to GPMMR"); } - for (auto current_core : l_core_targets) + for (auto& current_core : l_core_targets) { // check for maint mode or STOP state in core RAS Status register (try 5 times), if not reached fail // All ECs should already be there per initial instruction stop @@ -174,7 +174,7 @@ extern "C" { "Error with the RAS Status not being set as expected"); } - for (auto current_core : l_core_targets) + for (auto& current_core : l_core_targets) { // p9_inject_local_xstop.C // inject a local core checkstop on each core to prevent them from restarting @@ -252,7 +252,7 @@ extern "C" { auto l_pci_chiplets_vec = i_target.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL); - for (auto l_pci_chiplet : l_pci_chiplets_vec) + for (auto& l_pci_chiplet : l_pci_chiplets_vec) { //Get the PCI ID FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_pci_chiplet, l_pci_id), "Error getting the CHIP_UNIT_POS"); |