diff options
25 files changed, 99 insertions, 99 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C index fa550729..2fa17ccf 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C @@ -146,7 +146,7 @@ p9_hcd_cache_chiplet_reset( // If there is an unused, powered-off cache chiplet which needs to be // configured in the following steps to setup the PCB endpoint. - for(auto it : l_core_functional_vector) + for(auto& it : l_core_functional_vector) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, it.getParent<fapi2::TARGET_TYPE_PERV>(), diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C index f109e02f..04acb52d 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_gptr_time_initf.C @@ -75,7 +75,7 @@ p9_hcd_cache_gptr_time_initf( fapi2::RING_MODE_HEADER_CHECK), "Error from putRing (eq_time)"); - for (auto l_ex : l_ex_targets) + for (auto& l_ex : l_ex_targets) { FAPI_DBG("Scan ex_l3_gptr ring"); FAPI_TRY(fapi2::putRing(l_ex, ex_l3_gptr, diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C index afa3ae7a..3929280f 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C @@ -83,7 +83,7 @@ p9_hcd_cache_initf( FAPI_TRY(fapi2::putRing(i_target, eq_ana_func), "Error from putRing (eq_ana_func)"); - for (auto l_ex_target : i_target.getChildren<fapi2::TARGET_TYPE_EX>()) + for (auto& l_ex_target : i_target.getChildren<fapi2::TARGET_TYPE_EX>()) { FAPI_DBG("Scan ex_l2_fure ring"); FAPI_TRY(fapi2::putRing(l_ex_target, ex_l2_fure), diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C index 85690d8b..eac5ce08 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_repair_initf.C @@ -68,7 +68,7 @@ p9_hcd_cache_repair_initf( fapi2::RING_MODE_HEADER_CHECK), "Error from putRing (eq_repr)"); - for (auto l_ex : l_ex_targets) + for (auto& l_ex : l_ex_targets) { FAPI_DBG("Scan ex_l3_repr ring"); FAPI_TRY(fapi2::putRing(l_ex, ex_l3_repr, diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C index e97ab652..40c9420b 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C @@ -129,7 +129,7 @@ extern "C" { //Block wake up on all cores l_gpmmr_data.setBit<C_BLOCK_ALL_WKUP_EVENTS>().setBit<C_BLOCK_REG_WKUP_EVENTS>(); - for (auto current_core : l_core_targets) + for (auto& current_core : l_core_targets) { //Stop the threads on each core FAPI_EXEC_HWP(l_rc, p9_thread_control, current_core, C_ALL_THREADS, PTC_CMD_STOP, l_thread_warncheck, l_ras_status, @@ -146,7 +146,7 @@ extern "C" { FAPI_TRY(fapi2::putScom(current_core, C_PPM_GPMMR_SCOM1, l_gpmmr_data), "Error writing to GPMMR"); } - for (auto current_core : l_core_targets) + for (auto& current_core : l_core_targets) { // check for maint mode or STOP state in core RAS Status register (try 5 times), if not reached fail // All ECs should already be there per initial instruction stop @@ -174,7 +174,7 @@ extern "C" { "Error with the RAS Status not being set as expected"); } - for (auto current_core : l_core_targets) + for (auto& current_core : l_core_targets) { // p9_inject_local_xstop.C // inject a local core checkstop on each core to prevent them from restarting @@ -252,7 +252,7 @@ extern "C" { auto l_pci_chiplets_vec = i_target.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL); - for (auto l_pci_chiplet : l_pci_chiplets_vec) + for (auto& l_pci_chiplet : l_pci_chiplets_vec) { //Get the PCI ID FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_pci_chiplet, l_pci_id), "Error getting the CHIP_UNIT_POS"); diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C index b1521ec3..09e23e59 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C @@ -97,7 +97,7 @@ fapi2::ReturnCode p9_sbe_load_bootloader( //Find the master core for writing the HRMOR later FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MASTER_CORE, i_master_chip_target, l_master_core), "Error getting ATTR_MASTER_CORE"); - for ( auto l_current_core : i_master_ex_target.getChildren<fapi2::TARGET_TYPE_CORE>()) + for ( auto& l_current_core : i_master_ex_target.getChildren<fapi2::TARGET_TYPE_CORE>()) { uint8_t l_attr_chip_unit_pos = 0; fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = l_current_core.getParent<fapi2::TARGET_TYPE_PERV>(); diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C index a545d28d..c339dd3d 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C @@ -109,7 +109,7 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_CHIP_ID, i_target, l_fbc_chip_id), "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_CHIP_ID)"); - for (auto l_chplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_TP | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_XBUS | @@ -316,7 +316,7 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) l_target_filter = static_cast<fapi2::TargetFilter>(l_target_filter | fapi2::TARGET_FILTER_ALL_MC); } - for (auto l_chplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV>(l_target_filter, + for (auto& l_chplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV>(l_target_filter, fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -327,7 +327,7 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) // configure PCI tracing logic { - for (auto l_chplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_PCI), fapi2::TARGET_STATE_FUNCTIONAL)) { diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C index 97be7060..22bc4c49 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_hcd_cache_dcc_skewadjust_setup.C @@ -66,7 +66,7 @@ fapi2::ReturnCode p9_hcd_cache_dcc_skewadjust_setup(const l_data64.clearBit<24>(); FAPI_TRY(fapi2::putScom(l_perv, PERV_NET_CTRL1_WAND, l_data64)); - for(auto it : l_core_functional_vector) + for(auto& it : l_core_functional_vector) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, it.getParent<fapi2::TARGET_TYPE_PERV>(), diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C index b131c510..63385c0e 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_arrayinit.C @@ -70,7 +70,7 @@ fapi2::ReturnCode p9_sbe_arrayinit(const fapi2::buffer<uint16_t> l_regions; FAPI_INF("p9_sbe_arrayinit: Entering ..."); - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C index 3db37dcd..182636d1 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_initf.C @@ -45,7 +45,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_initf(const { FAPI_INF("p9_sbe_chiplet_pll_initf: Entering ..."); - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_XBUS | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -110,7 +110,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_initf(const } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Scan mc_pll_bndy_bucket_1 ring"); FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_pll_bndy_bucket_1, fapi2::RING_MODE_SET_PULSE_NSL), diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C index c1cb606c..e2dea74e 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_pll_setup.C @@ -89,7 +89,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const uint8_t l_bypass = 0; FAPI_INF("p9_sbe_chiplet_pll_setup: Entering ..."); - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop PDLY bypass"); @@ -104,7 +104,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const if ( l_read_attr ) { - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("call clock start stop module and drop syncclk muxsel"); @@ -113,7 +113,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const if (l_bypass == 0) { - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -121,7 +121,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const FAPI_TRY(p9_sbe_chiplet_pll_setup_pll_test_enable(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -130,14 +130,14 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const FAPI_TRY(p9_sbe_chiplet_pll_setup_pll_reset(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Check pll lock for PCIe"); FAPI_TRY(p9_sbe_chiplet_pll_setup_check_pci_pll_lock(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -146,7 +146,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const } } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -156,14 +156,14 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const } else { - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop MCC bypass"); FAPI_TRY(p9_sbe_chiplet_pll_setup_mc_dcc_bypass(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("call clock start stop module and drop syncclk_muxsel"); @@ -172,7 +172,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const if (l_bypass == 0) { - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -181,7 +181,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const FAPI_TRY(p9_sbe_chiplet_pll_setup_pll_test_enable(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -190,14 +190,14 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const FAPI_TRY(p9_sbe_chiplet_pll_setup_pll_reset(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Check pll lock for pcie"); FAPI_TRY(p9_sbe_chiplet_pll_setup_check_pci_pll_lock(l_chplt_trgt)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -207,7 +207,7 @@ fapi2::ReturnCode p9_sbe_chiplet_pll_setup(const } } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index f62ff0d1..1227e881 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -179,7 +179,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const if (attr_force_all) { - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_CACHES, fapi2::TARGET_STATE_FUNCTIONAL)) { // Configuring chiplet multicasting registers.. @@ -187,7 +187,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_mc_setup_cache(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_CORES, fapi2::TARGET_STATE_FUNCTIONAL)) { // Configuring chiplet multicasting registers.. @@ -212,7 +212,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_VITL_CLK_SETUP, i_target_chip, l_attr_vitl_setup)); - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -223,7 +223,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const p9SbeChipletReset::MCGR_CNFG_SETTING_GROUP0)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Configuring multicast registers for MC01,MC23"); @@ -232,7 +232,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const p9SbeChipletReset::MCGR_CNFG_SETTING_GROUP2)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_CACHES | fapi2::TARGET_FILTER_ALL_CORES | fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | @@ -244,7 +244,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_all_cplt_net_cntl_setup(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { // Setting up hang pulse counter for register 0 and register 6 @@ -254,7 +254,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const p9SbeChipletReset::HANG_PULSE_0X08)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { // Setting up hang pulse counter for register 0 and register 6 @@ -264,7 +264,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const p9SbeChipletReset::HANG_PULSE_0X08)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -275,7 +275,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const 0xff, 0xff, 0xff, p9SbeChipletReset::HANG_PULSE_0X08)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_NEST, fapi2::TARGET_STATE_FUNCTIONAL)) { // Setting up hang pulse counter for register 5 @@ -283,7 +283,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_nest_hang_cnt_setup(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_CORES, fapi2::TARGET_STATE_FUNCTIONAL)) { // Setting up hang pulse counter for register 5 @@ -294,7 +294,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const p9SbeChipletReset::HANG_PULSE_0X08)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_CACHES, fapi2::TARGET_STATE_FUNCTIONAL)) { // Setting up hang pulse counter for register 5 @@ -317,7 +317,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const l_target_state = fapi2::TARGET_STATE_PRESENT; } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_CACHES | fapi2::TARGET_FILTER_ALL_CORES | fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | @@ -328,14 +328,14 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_pll_setup(l_target_cplt, true)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_NEST_WEST, l_target_state)) { FAPI_DBG("Drop clk async reset for N3 chiplet"); FAPI_TRY(p9_sbe_chiplet_reset_nest_ob_async_reset(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, l_target_state)) { FAPI_DBG("Drop clk async reset for Mc chiplet"); @@ -348,7 +348,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const { l_target_state = fapi2::TARGET_STATE_PRESENT; - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_CACHES | fapi2::TARGET_FILTER_ALL_CORES | fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | @@ -359,7 +359,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_pll_setup(l_target_cplt, false)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, l_target_state)) { FAPI_DBG("Raise clk async reset for Mc chiplet"); @@ -367,21 +367,21 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const } } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop clk async reset for N3, Mc and Obus chiplets"); FAPI_TRY(p9_sbe_chiplet_reset_nest_ob_async_reset(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop clk_div_bypass for Mc chiplet"); FAPI_TRY(p9_sbe_chiplet_reset_div_clk_bypass(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_CACHES | fapi2::TARGET_FILTER_ALL_CORES | fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | @@ -392,7 +392,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_setup(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), @@ -403,7 +403,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), @@ -413,7 +413,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_opcg_cnfg(l_target_cplt)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -422,7 +422,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_TRY(p9_sbe_chiplet_reset_enable_listen_to_sync(l_target_cplt, true)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -434,7 +434,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const FAPI_DBG("Set Chip-wide HSSPORWREN gate"); FAPI_TRY(p9_sbe_chiplet_reset_hsspowergate(i_target_chip)); - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Setup IOP Logic for PCIe"); @@ -448,7 +448,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const { if (l_mc_sync_mode) { - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -458,7 +458,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const } else { - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_NEST), fapi2::TARGET_STATE_FUNCTIONAL)) { @@ -467,7 +467,7 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const } } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_NEST | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), @@ -669,28 +669,28 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_clk_mux_call( FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CLOCK_PLL_MUX, i_target_chiplet, l_read_attr)); - for (auto l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_PRESENT)) { FAPI_DBG("Mux settings for Mc chiplet"); FAPI_TRY(p9_sbe_chiplet_reset_clk_mux_MC(l_target_cplt, l_read_attr)); } - for (auto l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_PRESENT)) { FAPI_DBG("Mux settings for OB chiplet"); FAPI_TRY(p9_sbe_chiplet_reset_clk_mux_obus(l_target_cplt, l_read_attr)); } - for (auto l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_XBUS, fapi2::TARGET_STATE_PRESENT)) { FAPI_DBG("Mux settings for XB chiplet"); FAPI_TRY(p9_sbe_chiplet_reset_clk_mux_xbus(l_target_cplt, l_read_attr)); } - for (auto l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_PRESENT)) { FAPI_DBG("Mux settings for Pcie chiplet"); @@ -1415,7 +1415,7 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_all_obus_scan0( FAPI_INF("p9_sbe_chiplet_reset_all_obus_scan0: Entering ..."); - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_PRESENT)) { @@ -1492,7 +1492,7 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_sectorbuffer_pulsemode_attr_setup( FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PULSE_MODE_VALUE, l_sys, l_attr_pulse_mode_value)); - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC | fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C index 20be1030..327e4fd1 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_common.C @@ -669,7 +669,7 @@ fapi2::ReturnCode p9_sbe_common_get_pg_vector(const fapi2::buffer<uint8_t> l_read_attrunitpos; FAPI_INF("p9_sbe_common_get_pg_vector: Entering ..."); - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_target_cplt, l_read_attrunitpos)); uint8_t bitPos = l_read_attrunitpos; diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C index 418110e1..8fbc6197 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_gptr_time_initf.C @@ -47,7 +47,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const FAPI_INF("p9_sbe_gptr_time_initf: Entering ..."); - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST> + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST> (fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Scan mc_gptr ring"); @@ -67,7 +67,7 @@ fapi2::ReturnCode p9_sbe_gptr_time_initf(const "Error from putRing (mc_time)"); } - for( auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for( auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> ( fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos)); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C index 0e043e35..aaabb2bf 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_io_initf.C @@ -46,7 +46,7 @@ fapi2::ReturnCode p9_sbe_io_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH FAPI_INF("p9_sbe_io_initf: Entering ..."); uint8_t l_attr_chip_unit_pos = 0; - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos)); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C index 80f3a927..97c26c64 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_enable_ridi.C @@ -52,7 +52,7 @@ fapi2::ReturnCode p9_sbe_nest_enable_ridi(const (fapi2::TARGET_STATE_FUNCTIONAL); FAPI_DBG("p9_sbe_nest_enable_ridi: Entering ..."); - for (auto l_chplt_trgt : l_perv_functional_vector) + for (auto& l_chplt_trgt : l_perv_functional_vector) { uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C index 731a0955..ba42dfba 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C @@ -48,7 +48,7 @@ fapi2::ReturnCode p9_sbe_nest_initf(const uint8_t l_attr_chip_unit_pos = 0; fapi2::buffer<uint16_t> l_read_attr; - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_chplt_trgt, l_read_attr)); FAPI_DBG("ATTR_PG Value : %#04lx", l_read_attr); @@ -127,7 +127,7 @@ fapi2::ReturnCode p9_sbe_nest_initf(const } } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_fure)); #if 0 diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C index f3017a1a..90cd26ce 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_startclocks.C @@ -93,7 +93,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const FAPI_TRY(p9_sbe_common_get_pg_vector(i_target_chip, l_pg_vector)); FAPI_DBG("pg targets vector: %#018lX", l_pg_vector); - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_target_cplt, @@ -129,14 +129,14 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const fapi2::TARGET_FILTER_NEST_EAST | fapi2::TARGET_FILTER_TP); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop chiplet fence for N3"); FAPI_TRY(p9_sbe_nest_startclocks_N3_fence_drop(l_trgt_chplt, l_pg_vector)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -147,7 +147,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const if ( l_read_attr ) { - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop chiplet fence for MC"); @@ -155,7 +155,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const } } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (l_nest_filter, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(p9_sbe_nest_startclocks_get_attr_pg(l_trgt_chplt, l_attr_pg)); @@ -164,14 +164,14 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const FAPI_TRY(p9_sbe_common_cplt_ctrl_action_function(l_trgt_chplt, l_attr_pg)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (l_nest_tp_filter, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Call module align chiplets for Nest and Mc chiplets"); FAPI_TRY(p9_sbe_common_align_chiplets(l_trgt_chplt)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -185,14 +185,14 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const DONT_STARTMASTER, l_clock_regions, CLOCK_TYPES)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(p9_sbe_common_clock_start_stop(l_target_cplt, CLOCK_CMD, DONT_STARTSLAVE, STARTMASTER, l_n3_clock_regions, CLOCK_TYPES)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_NEST_NORTH | fapi2::TARGET_FILTER_NEST_SOUTH | fapi2::TARGET_FILTER_NEST_EAST), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -206,7 +206,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const l_ccstatus_regions, CLOCK_TYPES)); } - for (auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Call clockstatus check function for N3"); @@ -216,7 +216,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const if ( l_read_attr ) { - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_MC, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_trgt_chplt, @@ -231,7 +231,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const if ( l_read_flush_attr ) { - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (l_dd1_filter_without_N3, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("clear flush_inhibit to go into flush mode"); @@ -240,7 +240,7 @@ fapi2::ReturnCode p9_sbe_nest_startclocks(const } else { - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (l_nest_tp_filter, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("clear flush_inhibit to go into flush mode"); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C index f8097428..757dd412 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_repr_initf.C @@ -45,12 +45,12 @@ fapi2::ReturnCode p9_sbe_repr_initf(const uint8_t l_attr_chip_unit_pos = 0; FAPI_INF("p9_sbe_repr_initf: Entering ..."); - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(fapi2::putRing(l_chplt_trgt, mc_repr)); } - for (auto l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) + for (auto& l_chplt_trgt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>(fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_trgt, l_attr_chip_unit_pos)); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C index 4eaf9f6c..0d97e03c 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C @@ -198,7 +198,7 @@ fapi2::ReturnCode p9_sbe_select_ex( // mode chosen. This is done to reduce conditional processing within the // vector loop to allow for better prefetch utilization. - for (auto core : l_core_functional_vector) + for (auto& core : l_core_functional_vector) { uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, @@ -275,7 +275,7 @@ fapi2::ReturnCode p9_sbe_select_ex( } // Core loop // Process the good EQs - for (auto eq : l_eq_functional_vector) + for (auto& eq : l_eq_functional_vector) { uint8_t l_attr_chip_unit_pos = 0; //actual value is read in FAPI_ATTR_GET below FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C index 7eb2651d..2401fe19 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_setup_boot_freq.C @@ -116,7 +116,7 @@ setDPLLFrequency(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, l_data.insertFromRight<17, 11>(i_DpllBootFreqMult); - for(auto l_tlst : l_present_eqs) + for(auto& l_tlst : l_present_eqs) { FAPI_TRY(fapi2::putScom(l_tlst, EQ_QPPM_DPLL_FREQ, l_data)); //@todo,Determine ff_slew rate value RTC 140053 diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C index 3d70b1d2..da4bff54 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_startclock_chiplets.C @@ -91,7 +91,7 @@ fapi2::ReturnCode p9_sbe_startclock_chiplets(const FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OBUS_RATIO_VALUE, i_target_chip, l_attr_obus_ratio)); - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_TRY(p9_sbe_startclock_chiplets_set_ob_ratio(l_trgt_chplt, @@ -101,7 +101,7 @@ fapi2::ReturnCode p9_sbe_startclock_chiplets(const FAPI_TRY(p9_sbe_common_get_pg_vector(i_target_chip, l_pg_vector)); FAPI_DBG("partial good targets vector: %#018lX", l_pg_vector); - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) @@ -127,28 +127,28 @@ fapi2::ReturnCode p9_sbe_startclock_chiplets(const DONT_STARTSLAVE, DONT_STARTMASTER, l_regions, CLOCK_TYPES)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_XBUS, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop chiplet fence for Xbus"); FAPI_TRY(p9_sbe_startclock_chiplets_xb_fence_drop(l_trgt_chplt, l_pg_vector)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_OBUS, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop Chiplet fence for Obus"); FAPI_TRY(p9_sbe_startclock_chiplets_ob_fence_drop(l_trgt_chplt, l_pg_vector)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (fapi2::TARGET_FILTER_ALL_PCI, fapi2::TARGET_STATE_FUNCTIONAL)) { FAPI_DBG("Drop chiplet fence for PCIe"); FAPI_TRY(p9_sbe_startclock_chiplets_pci_fence_drop(l_trgt_chplt, l_pg_vector)); } - for (auto l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> + for (auto& l_trgt_chplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV> (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_OBUS | fapi2::TARGET_FILTER_ALL_PCI | fapi2::TARGET_FILTER_XBUS), fapi2::TARGET_STATE_FUNCTIONAL)) diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C index 5713b4b6..4bdec401 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_ocb_init.C @@ -489,7 +489,7 @@ fapi2::ReturnCode pm_ocb_reset( // ------------------------------------------------------------------------- // Loop over PIB Registers // ------------------------------------------------------------------------- - for (auto chan : v_reset_chan) + for (auto& chan : v_reset_chan) { FAPI_INF(" Reset OCB channel : %d", chan); @@ -521,7 +521,7 @@ fapi2::ReturnCode pm_ocb_reset( // ------------------------------------------------------------------------- // Loop over OCI Registers // ------------------------------------------------------------------------- - for (auto chan : v_reset_chan) + for (auto& chan : v_reset_chan) { FAPI_INF(" Reset OCB channel : %d", chan); diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.C index ce0cecb5..bccad9ff 100755 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.C @@ -157,7 +157,7 @@ fapi2::ReturnCode p9_pm_pfet_control_eq( } // Check for all core chiplets in EQ and power on/off targets accordingly - for (auto l_core_target : i_target.getChildren<fapi2::TARGET_TYPE_CORE> + for (auto& l_core_target : i_target.getChildren<fapi2::TARGET_TYPE_CORE> (fapi2::TARGET_STATE_FUNCTIONAL)) { l_unit_pos = l_core_target.getChipletNumber(); @@ -203,7 +203,7 @@ fapi2::ReturnCode p9_pm_pfet_control_ex( FAPI_INF("pfet control for EX chiplet %d", l_unit_pos); // Check for all core chiplets in EX and power on/off targets accordingly - for (auto l_core_target : i_target.getChildren<fapi2::TARGET_TYPE_CORE> + for (auto& l_core_target : i_target.getChildren<fapi2::TARGET_TYPE_CORE> (fapi2::TARGET_STATE_FUNCTIONAL)) { l_unit_pos = l_core_target.getChipletNumber(); diff --git a/src/import/hwpf/fapi2/include/ffdc.H b/src/import/hwpf/fapi2/include/ffdc.H index 6fa2e092..107f5741 100644 --- a/src/import/hwpf/fapi2/include/ffdc.H +++ b/src/import/hwpf/fapi2/include/ffdc.H @@ -179,7 +179,7 @@ class FirstFailureData /// inline void addErrorInfo(std::vector<std::shared_ptr<ErrorInfoFfdc>>& i_errorInfo) { - for( auto p : i_errorInfo ) + for( auto& p : i_errorInfo ) { iv_info->iv_ffdcs.push_back(p); } |
