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| author | Thi Tran <thi@us.ibm.com> | 2017-12-17 08:45:48 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-13 21:38:12 -0500 |
| commit | f55ed0656b82e5f9381e0fd8eefe935ca9611c0d (patch) | |
| tree | a23bb0e5b57996ccf0a48ad6f62ce0930a914be7 /src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C | |
| parent | d4106818dcc15dc4675107545fe307f4e7d47d12 (diff) | |
| download | talos-sbe-f55ed0656b82e5f9381e0fd8eefe935ca9611c0d.tar.gz talos-sbe-f55ed0656b82e5f9381e0fd8eefe935ca9611c0d.zip | |
p9_build_smp -- use ADU chipops to switch fabric configuration part #1
This commit is the first part of 49692, which is splitted in
order to have SBE platform proceed with code supports.
Change-Id: I1f491cac6cfef8476487217067d69d4551de1228
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51048
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51049
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C index a12e2808..dfc7c33f 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -251,6 +251,38 @@ extern "C" //--------------------------------------------------------------------------------- // NOTE: description in header //--------------------------------------------------------------------------------- + fapi2::ReturnCode p9_adu_coherent_utils_set_switch_action( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, + const bool i_switch_ab, + const bool i_switch_cd) + { + FAPI_DBG("Start"); + fapi2::buffer<uint64_t> pmisc_data; + fapi2::buffer<uint64_t> pmisc_mask; + + // Build ADU pMisc Mode register content + FAPI_DBG("writing ADU pMisc Mode register: switch_ab=%s, switch_cd=%s", + i_switch_ab ? "true" : "false", i_switch_cd ? "true" : "false"); + + // Switch AB bit + pmisc_data.writeBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_AB>(i_switch_ab); + pmisc_mask.setBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_AB>(); + + // Switch CD bit + pmisc_data.writeBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_CD>(i_switch_cd); + pmisc_mask.setBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_CD>(); + + FAPI_TRY(fapi2::putScomUnderMask(i_target, PU_SND_MODE_REG, pmisc_data, pmisc_mask), + "Error from putScomUnderMask (PU_SND_MODE_REG)"); + + fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; + } + + //--------------------------------------------------------------------------------- + // NOTE: description in header + //--------------------------------------------------------------------------------- fapi2::ReturnCode p9_adu_coherent_setup_adu( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, const uint64_t i_address, |
