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authorThi Tran <thi@us.ibm.com>2017-12-17 08:45:48 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2018-01-13 21:38:12 -0500
commitf55ed0656b82e5f9381e0fd8eefe935ca9611c0d (patch)
treea23bb0e5b57996ccf0a48ad6f62ce0930a914be7
parentd4106818dcc15dc4675107545fe307f4e7d47d12 (diff)
downloadtalos-sbe-f55ed0656b82e5f9381e0fd8eefe935ca9611c0d.tar.gz
talos-sbe-f55ed0656b82e5f9381e0fd8eefe935ca9611c0d.zip
p9_build_smp -- use ADU chipops to switch fabric configuration part #1
This commit is the first part of 49692, which is splitted in order to have SBE platform proceed with code supports. Change-Id: I1f491cac6cfef8476487217067d69d4551de1228 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51048 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51049 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C40
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C34
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H44
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C27
4 files changed, 124 insertions, 21 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
index 4e06e229..a1982c9e 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -43,6 +43,11 @@
#include <p9_adu_access.H>
#include <p9_adu_coherent_utils.H>
+// ADU operation delay times for HW/sim
+const uint32_t P9_ADU_ACCESS_ADU_OPER_HW_NS_DELAY = 10000;
+const uint32_t P9_ADU_ACCESS_ADU_OPER_SIM_CYCLE_DELAY = 50000;
+
+
extern "C" {
//--------------------------------------------------------------------------
@@ -74,23 +79,40 @@ extern "C" {
l_myAduFlag.setAutoIncrement(false);
}
+ // don't generate fabric command
+ if ((l_myAduFlag.getOperationType() == p9_ADU_oper_flag::PRE_SWITCH_AB) ||
+ (l_myAduFlag.getOperationType() == p9_ADU_oper_flag::PRE_SWITCH_CD) ||
+ (l_myAduFlag.getOperationType() == p9_ADU_oper_flag::POST_SWITCH))
+ {
+ goto fapi_try_exit;
+ }
+
//If we were using autoinc and this is the last granule we need to clear autoinc before the last read/write
if( i_lastGranule && l_myAduFlag.getAutoIncrement() )
{
FAPI_TRY(p9_adu_coherent_clear_autoinc(i_target), "Error from p9_adu_coherent_clear_autoinc");
}
- //If we are doing a read operation read the data
- if (i_rnw)
+ if (l_myAduFlag.isAddressOnly())
{
- FAPI_TRY(p9_adu_coherent_adu_read(i_target, i_firstGranule, i_address, l_myAduFlag, io_data),
- "Error from p9_adu_coherent_adu_read");
+ FAPI_TRY(fapi2::delay(P9_ADU_ACCESS_ADU_OPER_HW_NS_DELAY,
+ P9_ADU_ACCESS_ADU_OPER_SIM_CYCLE_DELAY),
+ "fapiDelay error");
}
- //Otherwise this is a write and write the data
else
{
- FAPI_TRY(p9_adu_coherent_adu_write(i_target, i_firstGranule, i_address, l_myAduFlag, io_data),
- "Error from p9_adu_coherent_adu_write");
+ //If we are doing a read operation read the data
+ if (i_rnw)
+ {
+ FAPI_TRY(p9_adu_coherent_adu_read(i_target, i_firstGranule, i_address, l_myAduFlag, io_data),
+ "Error from p9_adu_coherent_adu_read");
+ }
+ //Otherwise this is a write and write the data
+ else
+ {
+ FAPI_TRY(p9_adu_coherent_adu_write(i_target, i_firstGranule, i_address, l_myAduFlag, io_data),
+ "Error from p9_adu_coherent_adu_write");
+ }
}
//If we are not in fastmode or this is the last granule, we want to check the status
@@ -110,7 +132,7 @@ extern "C" {
//We only want to do the status check if this is not a ci operation
if (l_myAduFlag.getOperationType() != p9_ADU_oper_flag::CACHE_INHIBIT)
{
- FAPI_TRY(p9_adu_coherent_status_check(i_target, l_busyHandling, false,
+ FAPI_TRY(p9_adu_coherent_status_check(i_target, l_busyHandling, l_myAduFlag.isAddressOnly(),
l_busyBitStatus),
"Error from p9_adu_coherent_status_check");
}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
index a12e2808..dfc7c33f 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -251,6 +251,38 @@ extern "C"
//---------------------------------------------------------------------------------
// NOTE: description in header
//---------------------------------------------------------------------------------
+ fapi2::ReturnCode p9_adu_coherent_utils_set_switch_action(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ const bool i_switch_ab,
+ const bool i_switch_cd)
+ {
+ FAPI_DBG("Start");
+ fapi2::buffer<uint64_t> pmisc_data;
+ fapi2::buffer<uint64_t> pmisc_mask;
+
+ // Build ADU pMisc Mode register content
+ FAPI_DBG("writing ADU pMisc Mode register: switch_ab=%s, switch_cd=%s",
+ i_switch_ab ? "true" : "false", i_switch_cd ? "true" : "false");
+
+ // Switch AB bit
+ pmisc_data.writeBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_AB>(i_switch_ab);
+ pmisc_mask.setBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_AB>();
+
+ // Switch CD bit
+ pmisc_data.writeBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_CD>(i_switch_cd);
+ pmisc_mask.setBit<PU_SND_MODE_REG_ENABLE_PB_SWITCH_CD>();
+
+ FAPI_TRY(fapi2::putScomUnderMask(i_target, PU_SND_MODE_REG, pmisc_data, pmisc_mask),
+ "Error from putScomUnderMask (PU_SND_MODE_REG)");
+
+ fapi_try_exit:
+ FAPI_DBG("End");
+ return fapi2::current_err;
+ }
+
+ //---------------------------------------------------------------------------------
+ // NOTE: description in header
+ //---------------------------------------------------------------------------------
fapi2::ReturnCode p9_adu_coherent_setup_adu(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint64_t i_address,
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
index 65f93673..9af162f6 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -79,11 +79,14 @@ extern"C"
// Type of ADU operations
enum OperationType_t
{
- CACHE_INHIBIT = 0, //cache-inhibited 1, 2, 4, or 8 byte read/write
- DMA_PARTIAL = 1, //partial cache line direct memory access - always 8 byte read/write
- PB_DIS_OPER = 2,
- PMISC_OPER = 3,
- PB_INIT_OPER = 4
+ CACHE_INHIBIT = 0, // cache-inhibited 1, 2, 4, or 8 byte read/write
+ DMA_PARTIAL = 1, // partial cache line direct memory access - always 8 byte read/write
+ PB_DIS_OPER = 2, // pbop.disable_all
+ PMISC_OPER = 3, // pmisc switch
+ PB_INIT_OPER = 4, // pbop.enable_all
+ PRE_SWITCH_CD = 5, // do not issue PB command, pre-set for switch CD operation
+ PRE_SWITCH_AB = 6, // do not issue PB command, pre-set for switch AB operation
+ POST_SWITCH = 7 // do not issue PB command, clear switch CD/AB flags
};
// Transaction size -- only checked if not DMA
@@ -105,6 +108,21 @@ extern"C"
}
///
+ /// @brief Determine if ADU operation type is address only
+ /// or will require data transfer
+ ///
+ /// @param[in] i_type ADU operation type
+ ///
+ /// @return bool.
+ ///
+ inline bool isAddressOnly(void)
+ {
+ return ((iv_operType == PB_DIS_OPER) ||
+ (iv_operType == PMISC_OPER) ||
+ (iv_operType == PB_INIT_OPER));
+ }
+
+ ///
/// @brief Set the ADU operation type
///
/// @param[in] i_type ADU operation type
@@ -563,6 +581,20 @@ extern"C"
const uint64_t i_address,
uint32_t& o_numGranules);
+///
+/// @brief Set action which will occur on fabric pmisc switch command
+///
+/// @param[in] i_target Processor chip target
+/// @param[in] i_switch_ab Perform switch AB operation?
+/// @param[in] i_switch_cd Perform switch CD operation?
+///
+/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+///
+ fapi2::ReturnCode p9_adu_coherent_utils_set_switch_action(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ const bool i_switch_ab,
+ const bool i_switch_cd);
+
/// @brief does the setup for the ADU to set up the initial registers for a read/write
/// @param[in] i_target => P9 chip target
/// @param[in] i_address => starting address for ADU operation
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
index fb236f14..6c2c54b7 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -69,7 +69,7 @@ extern "C"
p9_ADU_oper_flag l_myAduFlag;
l_myAduFlag.getFlag(i_flags);
- //If autoinc is set and this is not a DMA operation unset autoinc before passing the flags through
+ // permit/pass autoinc only if performing a DMA operation
if (l_myAduFlag.getOperationType() != p9_ADU_oper_flag::DMA_PARTIAL)
{
l_myAduFlag.setAutoIncrement(false);
@@ -77,13 +77,30 @@ extern "C"
uint32_t l_flags = l_myAduFlag.setFlag();
+ // don't generate fabric command, just pre-condition ADU for upcoming switch
+ if ((l_myAduFlag.getOperationType() == p9_ADU_oper_flag::PRE_SWITCH_AB) ||
+ (l_myAduFlag.getOperationType() == p9_ADU_oper_flag::PRE_SWITCH_CD) ||
+ (l_myAduFlag.getOperationType() == p9_ADU_oper_flag::POST_SWITCH))
+ {
+ FAPI_TRY(p9_adu_coherent_utils_set_switch_action(
+ i_target,
+ (l_myAduFlag.getOperationType() == p9_ADU_oper_flag::PRE_SWITCH_AB),
+ (l_myAduFlag.getOperationType() == p9_ADU_oper_flag::PRE_SWITCH_CD)),
+ "Error from p9_adu_coherent_utils_set_switch_action");
+ o_numGranules = 1;
+ goto fapi_try_exit;
+ }
+
//check arguments
FAPI_TRY(p9_adu_coherent_utils_check_args(i_target, i_address, l_flags),
"Error from p9_adu_coherent_utils_check_args");
- //ensure fabric is running
- FAPI_TRY(p9_adu_coherent_utils_check_fbc_state(i_target),
- "Error from p9_adu_coherent_utils_check_fbc_status");
+ //ensure fabric is running, unless we're trying to initialize it
+ if (l_myAduFlag.getOperationType() != p9_ADU_oper_flag::PB_INIT_OPER)
+ {
+ FAPI_TRY(p9_adu_coherent_utils_check_fbc_state(i_target),
+ "Error from p9_adu_coherent_utils_check_fbc_status");
+ }
//acquire ADU lock to guarantee exclusive use of the ADU resources
//ADU state machine will be reset/cleared by this routine
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