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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-12-29 15:53:03 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-02-02 21:47:44 -0500 |
| commit | 234c3bcaa7cb7dced78d9885be4cebc7ab6b0a3d (patch) | |
| tree | f46f4c62b83b4a3249d335fb9437f607e428f8d1 /src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C | |
| parent | f003212ce80313b66078e39a6d29ae9d60dfcdb9 (diff) | |
| download | talos-sbe-234c3bcaa7cb7dced78d9885be4cebc7ab6b0a3d.tar.gz talos-sbe-234c3bcaa7cb7dced78d9885be4cebc7ab6b0a3d.zip | |
FIR updates -- pervasive/core/PPE
p9_obus_scom_address_fixes.H
add OBUS IO PPE address constants
p9.cme.scan.initfile
align EQ pervasive LFIR/XFIR settings with RAS XML docs
p9.core.scan.initfile
align EC pervasive LFIR/XFIR settings with RAS XML docs
p9.core.scom.initfile
p9_hcd_core_scominit.c
adjust core FIR action settings for bits 1,12:13 to match RAS XML doc
p9_sbe_scominit.C
mask PBA FIR bit 1 to match RAS XML doc
initialize FBC/XBUS/OBUS PPE FIR registers
p9_sbe_common.C
align non-EQ/EC pervasive LFIR/XFIR settings with RAS XML docs
CMVC-prereq:1014393
CMVC-prereq:1014431
Change-Id: Ifbc6a47eb2dbe268a7ea832e55986d46a1870420
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34271
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34336
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C index 59aababd..80f65383 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C @@ -31,7 +31,7 @@ using namespace fapi2; constexpr uint64_t literal_0x0301D70000AB7696 = 0x0301D70000AB7696; constexpr uint64_t literal_0x0000000000000000 = 0x0000000000000000; -constexpr uint64_t literal_0xA858009775100008 = 0xA858009775100008; +constexpr uint64_t literal_0xA854009775100008 = 0xA854009775100008; fapi2::ReturnCode p9_core_scom(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& TGT0) { @@ -52,7 +52,7 @@ fapi2::ReturnCode p9_core_scom(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& TGT { FAPI_TRY(fapi2::getScom( TGT0, 0x20010a47ull, l_scom_buffer )); - l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0xA858009775100008 ); + l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0xA854009775100008 ); FAPI_TRY(fapi2::putScom(TGT0, 0x20010a47ull, l_scom_buffer)); } |
