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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2015-09-19 10:17:45 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2015-12-01 01:02:48 -0600
commit91d1c597b9e78f21c9b83c5ee91ad8c5803813f1 (patch)
treecb167596d1b195046b57c9cae5ea54d64a9e1893 /import
parent5eeb657b9b85d43884096e589097f026e632b241 (diff)
downloadtalos-sbe-91d1c597b9e78f21c9b83c5ee91ad8c5803813f1.tar.gz
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Checking in the L2 p9_sbe_load_bootloader procedures
Change-Id: I9c45fe9b7293d723747c69d86b164fb583d4d154 Original-Change-Id: Iaba2952f7e01257e7d170bbf70dd16ae9f68eb2e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20631 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22330 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import')
-rw-r--r--import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H93
-rwxr-xr-ximport/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml49
2 files changed, 142 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H b/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
new file mode 100644
index 00000000..388da602
--- /dev/null
+++ b/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.H
@@ -0,0 +1,93 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/ipl/hwp/p9_sbe_load_bootloader.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//------------------------------------------------------------------------------------
+//
+/// @file p9_sbe_load_bootloader.H
+/// @brief Shift HB bootloader payload from SEEPROM to L3 cache of master core via PBA
+//
+// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP HWP Writer: Murey A Luna Torres malunato@us.ibm.com, Joseph McGill jmcgill@us.ibm.com
+// *HWP FW Owner: Thi Tran thi@us.ibm.com
+// *HWP Team: Nest
+// *HWP Level: 2
+// *HWP Consumed by: SBE
+//-----------------------------------------------------------------------------------
+// *! ADDITIONAL COMMENTS:
+// *!
+// *! This hardware procedure is used to load a bootloader image from seeprom into
+// *! L3 of master core via PBA unit.
+// *!
+// *! Successful operation assumes that:
+// *! PBA communication is available
+// *!
+// *! High-level procedure flow:
+// *!
+//------------------------------------------------------------------------------------
+
+#ifndef _SBE_BOOTLOADER_H_
+#define _SBE_BOOTLOADER_H_
+
+//-----------------------------------------------------------------------------------
+// Includes
+//-----------------------------------------------------------------------------------
+
+#include <fapi2.H>
+
+//-----------------------------------------------------------------------------------
+// Structure definitions
+//-----------------------------------------------------------------------------------
+
+//function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode(*p9_sbe_load_bootloader_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
+ const fapi2::Target<fapi2::TARGET_TYPE_EX>&,
+ const uint64_t,
+ uint64_t*);
+
+//-----------------------------------------------------------------------------------
+// Constant definitions
+//-----------------------------------------------------------------------------------
+
+extern "C" {
+
+ //-----------------------------------------------------------------------------------
+ // Function prototype
+ //-----------------------------------------------------------------------------------
+ //
+/// @brief Shift HB bootloader payload from SEEPROM to L3 cache of master core via PBA
+/// @param[in] i_master_chip_target Reference to master processor chip target
+/// @param[in] i_master_ex_target Reference to master ex unit target
+/// @param[in] i_payload_size Size of image payload load to load, in B
+/// @param[in] i_payload_data Pointer to image payload data
+///
+/// @return FAPI_RC_SUCCESS if success, else error code
+///
+ fapi2::ReturnCode p9_sbe_load_bootloader(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_master_chip_target,
+ const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_master_eq_target,
+ const uint64_t i_payload_size,
+ uint64_t* i_payload_data);
+
+} //extern "C"
+
+#endif //_SBE_BOOTLOADER_H_
+
+
+
+
diff --git a/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
new file mode 100755
index 00000000..b41e877d
--- /dev/null
+++ b/import/chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml
@@ -0,0 +1,49 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: chips/p9/procedures/xml/error_info/p9_sbe_load_bootloader_errors.xml $ -->
+<!-- -->
+<!-- IBM CONFIDENTIAL -->
+<!-- -->
+<!-- EKB Project -->
+<!-- -->
+<!-- COPYRIGHT 2015 -->
+<!-- [+] International Business Machines Corp. -->
+<!-- -->
+<!-- -->
+<!-- The source code for this program is not published or otherwise -->
+<!-- divested of its trade secrets, irrespective of what has been -->
+<!-- deposited with the U.S. Copyright Office. -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
+<!-- Halt codes for p9_sbe_load_bootloader -->
+<!-- TODO Add in the callout, gard, and deconfig info wherever applicable -->
+<hwpErrors>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_SBE_LOAD_BOOTLOADER_INVALID_TARGET_ADDRESS</rc>
+ <description>
+ Procedure: p9_sbe_load_bootloader
+ Target base address is not cacheline aligned.
+ </description>
+ <ffdc>CHIP_TARGET</ffdc>
+ <ffdc>EX_TARGET</ffdc>
+ <ffdc>TARGET_BASE_ADDRESS</ffdc>
+ <ffdc>FABRIC_GROUP_ID</ffdc>
+ <ffdc>FABRIC_ADDR_BAR_MODE</ffdc>
+ <ffdc>HRMOR_OFFSET</ffdc>
+ <ffdc>BOOTLOADER_OFFSET</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+ <hwpError>
+ <rc>RC_P9_SBE_LOAD_BOOTLOADER_INVALID_PAYLOAD_SIZE</rc>
+ <description>
+ Procedure: p9_sbe_load_bootloader
+ Payload size is invalid.
+ </description>
+ <ffdc>CHIP_TARGET</ffdc>
+ <ffdc>EX_TARGET</ffdc>
+ <ffdc>PAYLOAD_SIZE</ffdc>
+ </hwpError>
+ <!-- ******************************************************************** -->
+</hwpErrors>
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