Shift HWP content to align with desired EKB layout

Change-Id: I52a1d80d7d0d1c20a7dfcf752815bf7454337542
Original-Change-Id: Id22bf63b31e0631685139b9695c5a443cf4f2298
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20714
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22329
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

3 files changed, 333 insertions, 0 deletions

diff --git a/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H b/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
new file mode 100644
index 00000000..c33edb28
--- /dev/null
+++ b/import/chips/p9/procedures/hwp/core/p9_sbe_instruct_start.H
@@ -0,0 +1,61 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/ipl/hwp/p9_sbe_instruct_start.H $         */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_sbe_instruct_start.C
+/// @brief  Placeholder for overrides needed to step the core from cache-contained execution to expand to memory
+///
+// *HWP HWP Owner: Michael Dye <dyem@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 2
+// *HWP Consumed by: HB
+
+#ifndef _PROC_SBE_INSTRUCT_START_H_
+#define _PROC_SBE_INSTRUCT_START_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include <fapi2.H>
+#include <p9_thread_control.H>
+
+// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode
+(*p9_sbe_instruct_start_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& );
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+extern "C"
+{
+//------------------------------------------------------------------------------
+// Hardware Procedure
+//------------------------------------------------------------------------------
+///
+/// @brief Calls thread_control to start thread 0
+/// @param[in] i_target Reference to core target
+/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, RC_P9_THREAD_CONTROL_START_FAIL if start command failed,
+///         else error code
+///
+    fapi2::ReturnCode p9_sbe_instruct_start(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target);
+
+} // extern "C"
+
+#endif // _PROC_SBE_INSTRUCT_START_H_
diff --git a/import/chips/p9/procedures/hwp/core/p9_thread_control.H b/import/chips/p9/procedures/hwp/core/p9_thread_control.H
new file mode 100644
index 00000000..d5c55437
--- /dev/null
+++ b/import/chips/p9/procedures/hwp/core/p9_thread_control.H
@@ -0,0 +1,139 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/ipl/hwp/p9_thread_control.H $             */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : p9_thread_control
+// *! DESCRIPTION : Core Thread start/stop/step/query/activate operations
+// *!               Use to start (start or sreset) thread instruction execution,
+// *!                 stop instruction execution, or single instruction step.
+// *!               Also used to query the state of a thread.
+// *! OWNER NAME  : Nick Klazynski      Email: jklazyns@us.ibm.com
+// *! BACKUP NAME : Sebastien Lafontant Email: slafont@us.ibm.com
+//------------------------------------------------------------------------------
+
+// *HWP HWP Owner: Michael Dye <dyem@us.ibm.com>
+// *HWP FW Owner:  Brian Silver <bsilver@us.ibm.com>
+// *HWP Team:  Quad
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB:HS
+
+#ifndef _P9_THREAD_CONTROL_H_
+#define _P9_THREAD_CONTROL_H_
+
+#include <fapi2.H>
+#include <return_code.H>
+#include <error_scope.H>
+
+#include "p9_quad_scom_addresses.H"
+
+// A macro to wrap the warning check boiler plate
+// If the action failed and i_warncheck is set add a trace and continue anyway
+#define PTC_ASSERT_WARN( __conditional__, __warning__, __ffdc__, ... )  \
+    if (! (__conditional__))                                            \
+    {                                                                   \
+        if (__warning__)                                                \
+        {                                                               \
+            FAPI_INF(__VA_ARGS__);                                      \
+        }                                                               \
+        \
+        (__ffdc__).execute();                                           \
+        FAPI_ERR(__VA_ARGS__);                                          \
+        goto fapi_try_exit;                                             \
+    }
+
+
+// ProcThreadControl input commands
+// If you make this an enum, the compiler can
+// check that a case statement has all the elements
+// covered.
+enum ThreadCommands
+{
+    PTC_CMD_SRESET            = 0,
+    PTC_CMD_STEP              = 1,
+    PTC_CMD_START             = 2,
+    PTC_CMD_STOP              = 3,
+};
+
+enum ThreadRasStatus
+{
+    CORE_MAINT_MODE = 0,
+    THREAD_QUIESCED = 1,
+    ICT_EMPTY       = 2,
+    ISU_QUIESCED    = 3,
+    STEP_SUCCESS    = 4,
+};
+
+enum PTC_Constants
+{
+    RAS_MODE_STEP_SHIFT       = 52,
+    PTC_STEP_COMP_POLL_LIMIT  = 10,
+};
+
+// Bit positions in the DIRECT_CONTROL register
+enum ThreadControl
+{
+    CLEAR_MAINT      = 3,
+    SRESET_REQUEST   = 4,
+    CORE_STEP        = 5,
+    CORE_START       = 6,
+    CORE_STOP        = 7,
+};
+
+//--------------------------------------------------------------------------
+/// @brief p9_thread_control: utility subroutine to control thread state
+/// @param[in] i_target ex target
+/// @param[in] i_threads fused thread bitset (0b00000000..0b11111111)
+/// @param[in] i_command  one of
+///               PTC_CMD_SRESET => initiate sreset thread command
+///               PTC_CMD_START  => initiate start thread command
+///               PTC_CMD_STOP   => initiate stop thread command
+///               PTC_CMD_STEP   => initiate step thread command
+///               PTC_CMD_QUERY  => query and return thread state
+/// @param[in] i_warncheck convert pre/post checks errors to warnings
+/// @return FAPI_RC_SUCCESS if operation was successful,
+///         function-specific fail codes (see function definitions),
+///         else error
+//-------------------------------------------------------------------------
+extern fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target,
+        const uint8_t i_threads, const ThreadCommands i_command,
+        const bool i_warncheck);
+
+
+//--------------------------------------------------------------------------
+/// @brief p9_thread_control: utility subroutine to control thread state
+/// @param[in] i_target core target
+/// @param[in] i_thread normal core thread bitset (0b0000..0b1111)
+/// @param[in] i_command  one of
+///               PTC_CMD_SRESET => initiate sreset thread command
+///               PTC_CMD_START  => initiate start thread command
+///               PTC_CMD_STOP   => initiate stop thread command
+///               PTC_CMD_STEP   => initiate step thread command
+///               PTC_CMD_QUERY  => query and return thread state
+/// @param[in] i_warncheck convert pre/post checks errors to warnings
+/// @return FAPI_RC_SUCCESS if operation was successful,
+///         function-specific fail codes (see function definitions),
+///         else error
+//--------------------------------------------------------------------------
+extern fapi2::ReturnCode p9_thread_control(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target,
+        const uint8_t i_threads, const ThreadCommands i_command,
+        const bool i_warncheck);
+#endif // _P9_THREAD_CONTROL_H_
diff --git a/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml
new file mode 100644
index 00000000..e282852f
--- /dev/null
+++ b/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml
@@ -0,0 +1,133 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: chips/p9/procedures/ipl/hwp/p9_thread_control.xml $           -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- EKB Project                                                            -->
+<!--                                                                        -->
+<!-- COPYRIGHT 2012,2015                                                    -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- @brief Error definitions for p9_thread_control procedure               -->
+<hwpErrors>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_SRESET_PRE_FAIL</rc>
+    <description>SReset command precondition not met: Not all threads are running.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_SRESET_FAIL</rc>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <description>SReset command failed: Not all threads are running after sreset command.</description>
+    <callout>
+      <target>CORE_TARGET</target>
+      <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>LOW</priority>
+    </callout>
+    <deconfigure>
+      <target>CORE_TARGET</target>
+    </deconfigure>
+    <gard>
+      <target>CORE_TARGET</target>
+    </gard>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_START_PRE_NOMAINT</rc>
+    <description>Start command precondition not met: RAS STAT Maintenance bit is not set.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_START_FAIL</rc>
+    <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING</rc>
+    <description>Stop command precondition not met: Not all threads are running.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_STOP_FAIL</rc>
+    <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_STEP_PRE_NOTSTOPPING</rc>
+    <description>Step command precondition not met: Not all threads are stopped.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_P9_THREAD_CONTROL_STEP_FAIL</rc>
+    <description>Step command issued to core PC, but RAS STAT run bit is still set.</description>
+    <ffdc>CORE_TARGET</ffdc>
+    <ffdc>THREAD</ffdc>
+    <ffdc>PTC_STEP_COMP_POLL_LIMIT</ffdc>
+    <callout>
+      <target>CORE_TARGET</target>
+      <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>LOW</priority>
+    </callout>
+  </hwpError>
+
+</hwpErrors>