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author | Joe McGill <jmcgill@us.ibm.com> | 2015-09-22 22:15:06 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2015-12-01 01:02:30 -0600 |
commit | 5eeb657b9b85d43884096e589097f026e632b241 (patch) | |
tree | c58768b2aaa52c2c3d2b0328e6d7c0cc1d738c26 /import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml | |
parent | 20a4e0020c96a249b99d063aeae3469788114865 (diff) | |
download | talos-sbe-5eeb657b9b85d43884096e589097f026e632b241.tar.gz talos-sbe-5eeb657b9b85d43884096e589097f026e632b241.zip |
Shift HWP content to align with desired EKB layout
Change-Id: I52a1d80d7d0d1c20a7dfcf752815bf7454337542
Original-Change-Id: Id22bf63b31e0631685139b9695c5a443cf4f2298
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20714
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22329
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml')
-rw-r--r-- | import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml | 133 |
1 files changed, 133 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml b/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml new file mode 100644 index 00000000..e282852f --- /dev/null +++ b/import/chips/p9/procedures/xml/error_info/p9_thread_control_errors.xml @@ -0,0 +1,133 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: chips/p9/procedures/ipl/hwp/p9_thread_control.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- EKB Project --> +<!-- --> +<!-- COPYRIGHT 2012,2015 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- @brief Error definitions for p9_thread_control procedure --> +<hwpErrors> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_SRESET_PRE_FAIL</rc> + <description>SReset command precondition not met: Not all threads are running.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_SRESET_FAIL</rc> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <description>SReset command failed: Not all threads are running after sreset command.</description> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <deconfigure> + <target>CORE_TARGET</target> + </deconfigure> + <gard> + <target>CORE_TARGET</target> + </gard> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_START_PRE_NOMAINT</rc> + <description>Start command precondition not met: RAS STAT Maintenance bit is not set.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_START_FAIL</rc> + <description>Start command failed: RAS STAT instruction completed bit was not set after start command.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_STOP_PRE_NOTRUNNING</rc> + <description>Stop command precondition not met: Not all threads are running.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_STOP_FAIL</rc> + <description>Stop command issued to core PC, but RAS STAT maintenance bit is not set.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_STEP_PRE_NOTSTOPPING</rc> + <description>Step command precondition not met: Not all threads are stopped.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_P9_THREAD_CONTROL_STEP_FAIL</rc> + <description>Step command issued to core PC, but RAS STAT run bit is still set.</description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>THREAD</ffdc> + <ffdc>PTC_STEP_COMP_POLL_LIMIT</ffdc> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + </hwpError> + +</hwpErrors> |