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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-05-12 09:27:35 -0500 |
|---|---|---|
| committer | Prachi Gupta <pragupta@us.ibm.com> | 2016-06-08 11:45:53 -0500 |
| commit | 82f0dfad4b57c9bab4e6ffc3726ba0e3acaeac84 (patch) | |
| tree | bc0a31d3024cad58d7bb5b9ddabe2cd83a271a2a /import/chips/p9/procedures/hwp/cache | |
| parent | 446c0353e52bf1b2234aca22dba0d7f2ad69ed4e (diff) | |
| download | talos-sbe-82f0dfad4b57c9bab4e6ffc3726ba0e3acaeac84.tar.gz talos-sbe-82f0dfad4b57c9bab4e6ffc3726ba0e3acaeac84.zip | |
partial good/hang pulse updates to support all sim models/clock ratios
default PCB slave hang timer 6 to value appropriate for all sim ratios
handle PCB master timeout enable/disable in sim only HWPs
use ring caching to limit physical scans performed
qualify PCI PLL fastlock updates by perv target state
add XBUS CU PLL inits
qualify MEM PLL init by sync_mode
Change-Id: Ib884a1b73b8be7f99cfa0899613652406db95dbc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24433
Tested-by: Jenkins Server
Tested-by: PPE CI
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24485
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/hwp/cache')
| -rw-r--r-- | import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C b/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C index 22e51aad..b262d614 100644 --- a/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C +++ b/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_reset.C @@ -64,6 +64,7 @@ p9_hcd_cache_chiplet_reset( uint64_t l_l2gmux_input = 0; uint64_t l_l2gmux_reset = 0; uint8_t l_attr_chip_unit_pos = 0; + fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_chip = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = @@ -114,6 +115,10 @@ p9_hcd_cache_chiplet_reset( MASK_SET(2))); } + FAPI_DBG("Init heartbeat hang counter"); + l_data64.flush<0>().setBit<2>(); + FAPI_TRY(putScom(i_target, EQ_HANG_PULSE_6_REG, l_data64)); + FAPI_DBG("Init NET_CTRL0[1-5,11-14,18,22,26],step needed for hotplug"); l_data64 = p9hcd::Q_NET_CTRL0_INIT_VECTOR; FAPI_TRY(putScom(i_target, EQ_NET_CTRL0, l_data64)); |
