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| author | Dean Sanner <dsanner@us.ibm.com> | 2017-02-23 06:13:49 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-02-24 21:02:37 -0500 |
| commit | 36ef073ffc88c8bf2fe179f9f51914c7d8164ee5 (patch) | |
| tree | 490ad1c0c2c108ec9ee115edae942528a71bec59 | |
| parent | 49fdde5f4ba0752c6b99508d52bf107e688ac45e (diff) | |
| download | talos-sbe-36ef073ffc88c8bf2fe179f9f51914c7d8164ee5.tar.gz talos-sbe-36ef073ffc88c8bf2fe179f9f51914c7d8164ee5.zip | |
Defer setup of MC multicast groups in async mode
Change-Id: I42a8ed1c11ca995a3368c60af63afc8c9e46ed41
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36913
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36916
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C | 10 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H | 3 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index fac39832..9b8cddd4 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -215,6 +215,16 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const for (auto& targ : l_perv_func_WO_Core_Cache) { FAPI_DBG("Configuring multicasting registers for Mc,Nest,Xb,Obus,pcie chiplets"); + + // if in ASYNC mode DO NOT add to multicast groups because the chiplet is non + // responsive. Wait until clocks are started up in hostboot + uint32_t l_chipletID = targ.getChipletNumber(); + + if((l_chipletID >= 7 && l_chipletID <= 8) && (!l_mc_sync_mode)) + { + continue; + } + FAPI_TRY(p9_sbe_chiplet_reset_mc_setup(targ)); } diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H index c3b1a66b..990a01e9 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -53,6 +53,7 @@ namespace p9SbeChipletReset { enum P9_SBE_CHIPLET_RESET_Public_Constants { + MCGR_CNFG_SETTING_EMPTY = 0xFC00000000000000ull, MCGR_CNFG_SETTING_GROUP0 = 0xE0001C0000000000ull, MCGR_CNFG_SETTING_GROUP1 = 0xE4001C0000000000ull, MCGR_CNFG_SETTING_GROUP2 = 0xE8001C0000000000ull, |
