diff options
Diffstat (limited to 'arch/arm/boot/dts/exynos5250-arndale.dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos5250-arndale.dts | 40 |
1 files changed, 35 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index dc6fa6fe83f1..f8ebc620f42d 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -11,10 +11,11 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/input/input.h> #include <dt-bindings/clock/samsung,s2mps11.h> +#include <dt-bindings/sound/samsung-i2s.h> #include "exynos5250.dtsi" / { - model = "Insignal Arndale evaluation board based on EXYNOS5250"; + model = "Insignal Arndale evaluation board based on Exynos5250"; compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5"; memory@40000000 { @@ -135,6 +136,12 @@ }; }; + sound { + compatible = "samsung,arndale-wm1811"; + samsung,audio-cpu = <&i2s0>; + samsung,audio-codec = <&wm1811>; + }; + fixed-rate-clocks { xxti { compatible = "samsung,clock-xxti"; @@ -147,10 +154,20 @@ compatible = "smsc,usb3503a"; reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; - connect-gpios = <&gpd1 7 GPIO_ACTIVE_LOW>; + connect-gpios = <&gpd1 7 GPIO_ACTIVE_HIGH>; }; }; +&clock { + assigned-clocks = <&clock CLK_FOUT_EPLL>; + assigned-clock-rates = <49152000>; +}; + +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-parents = <&clock CLK_FOUT_EPLL>; +}; + &cpu0 { cpu0-supply = <&buck2_reg>; }; @@ -461,8 +478,8 @@ buck4_reg: BUCK4 { regulator-name = "vdd_g3d"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; regulator-always-on; regulator-boot-on; op_mode = <1>; @@ -502,9 +519,11 @@ &i2c_3 { status = "okay"; - wm1811a@1a { + wm1811: codec@1a { compatible = "wlf,wm1811"; reg = <0x1a>; + clocks = <&i2s0 CLK_I2S_CDCLK>; + clock-names = "MCLK1"; AVDD2-supply = <&main_dc_reg>; CPVDD-supply = <&main_dc_reg>; @@ -540,6 +559,17 @@ }; &i2s0 { + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>; + assigned-clock-parents = <&clock_audss EXYNOS_I2S_BUS>; + status = "okay"; +}; + +&i2s0_bus { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; +}; + +&mali { + mali-supply = <&buck4_reg>; status = "okay"; }; |
