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| author | Chris Cain <cjcain@us.ibm.com> | 2019-02-25 16:14:27 -0600 |
|---|---|---|
| committer | Christopher J. Cain <cjcain@us.ibm.com> | 2019-02-26 14:42:52 -0600 |
| commit | f65ac6e260876471061373524ca33e79e0080825 (patch) | |
| tree | 9924cda9a87576e70f474c300ff5dad74fb46d40 | |
| parent | c77b16ee36a3e8d89db142baca74387548e8773a (diff) | |
| download | talos-occ-f65ac6e260876471061373524ca33e79e0080825.tar.gz talos-occ-f65ac6e260876471061373524ca33e79e0080825.zip | |
Add regs for PGPE debug
Change-Id: I4a9cb7092548e7251806ae4e784fa5ee5a01fca2
CQ: SW457249
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72450
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
| -rwxr-xr-x | src/occ_405/errl/errl.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/occ_405/errl/errl.c b/src/occ_405/errl/errl.c index e40a9c6..0c705c5 100755 --- a/src/occ_405/errl/errl.c +++ b/src/occ_405/errl/errl.c @@ -386,6 +386,16 @@ errlHndl_t createPgpeErrl(const uint16_t i_modId, { TRAC_INFO("createPgpeErrl: Creating error log in slot [%d]", l_errSlot); + // Trace a few regs for PGPE debug + uint32_t l_oisr0_status; // OCC Interrupt Source 0 Register + uint32_t l_oisr1_status; // OCC Interrupt Source 1 Register + uint32_t l_occs2_status; // OCC Scratch 2 + l_oisr0_status = in32(OCB_OISR0); + l_oisr1_status = in32(OCB_OISR1); + l_occs2_status = in32(OCB_OCCS2); + TRAC_IMP("createPgpeErrl: OISR0=0x%08X, OISR1=0x%08X, OCCS2=0x%08X", + l_oisr0_status, l_oisr1_status, l_occs2_status); + // get slot pointer l_err = G_occErrSlots[ l_errSlot ]; |
