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path: root/drivers/gpio/s5p_gpio.c
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* gpio: exynos(s5p): remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Exynos/S5P gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* gpio: s5p: call: dev_get_addr() instead of fdtdec_get_addr()Przemyslaw Marczak2015-10-031-7/+11
| | | | | | | | | | | | | | | | | | | | | | After rework in lib/fdtdec.c, the function fdtdec_get_addr() doesn't work for nodes with #size-cells property set to 0. To get GPIO's 'reg' property, the code should use one of: fdtdec_get_addr_size_auto_no/parent() function. Fortunately dm core provides a function to get the property. This commit reworks function gpio_exynos_bind(), to properly use dev_get_addr() for GPIO device. This prevents setting a wrong base register for Exynos GPIOs. Tested on: Odroid U3/X2, Trats, Trats2, Odroid XU3, Snow (by Simon). Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* dm: Use dev_get_addr() where possibleSimon Glass2015-08-311-2/+1
| | | | | | | | | | This is a convenient way for a driver to get the hardware address of a device, when regmap or syscon are not being used. Change existing callers to use it as an example to others. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* dm: core: Add dev_get_uclass_priv() to access uclass private dataSimon Glass2015-04-161-1/+1
| | | | | | | | Add a convenience function to access the private data that a uclass stores for each of its devices. Convert over most existing uses for consistency and to provide an example for others. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: exynos: Add a GPIO translation functionSimon Glass2015-01-291-1/+12
| | | | | | | | This deals with the polarity bit. It also changes the GPIO devices so that the correct device tree node is linked to each one. This allows us to use the new uclass phandle functionality to implement a proper GPIO binding. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: exynos: Drop request()/free() in the driverSimon Glass2014-10-231-101/+0
| | | | | | | Now that the uclass supports gpio_request/free() there is no need for the driver to implement it too. Drop this unnecessary code. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: exynos: gpio: Convert to driver modelSimon Glass2014-10-221-136/+288
| | | | | | | Convert the exynos GPIO driver to driver model. This implements the generic GPIO interface but not the extra Exynos-specific functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: exynos: Tidy up GPIO definesSimon Glass2014-10-221-10/+11
| | | | | | | | | The defines at the top of the GPIO driver use single-character names for parameters which are not very descriptive. Improve these to use descriptive parameter names. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: exynos: Tidy up GPIO headersSimon Glass2014-10-221-2/+1
| | | | | | | | | The wrong header is being included, thus requiring the code to re-declare the generic GPIO interface in each GPIO header. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* S5P: Exynos: Add GPIO pin numbering and rename definitionsAkshay Saraswat2014-05-131-33/+171
| | | | | | | | | | | | | | | | | | | | | | | This patch includes following changes : * Adds gpio pin numbering support for EXYNOS SOCs. To have consistent 0..n-1 GPIO numbering the banks are divided into different parts where ever they have holes in them. * Rename GPIO definitions from GPIO_... to S5P_GPIO_... These changes were done to enable cmd_gpio for EXYNOS and cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence getting a error during compilation. * Adds support for name to gpio conversion in s5p_gpio to enable gpio command EXYNOS SoCs. Function has been added to asm/gpio.h to decode the input gpio name to gpio number. Example: SMDK5420 # gpio set gpa00 Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* s5p: gpio: change gpio coding method for s5p gpio.Przemyslaw Marczak2014-02-031-6/+9
| | | | | | | | | | | | | Old s5p gpio coding method was not clean and was not working properly for all parts and banks. New method is clean and easy to extend. Gpio coding mask: 0x000000ff - pin number 0x00ffff00 - bank offset 0xff000000 - part number Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-14/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* gpio: s5p_gpio: Call s5p_gpio_set_value() instead of open-codeAxel Lin2013-06-251-8/+1
| | | | | | | Call s5p_gpio_set_value() to avoid code duplication. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* gpio:fix: Proper handling of GPIO subsystem parts at Samsung devicesŁukasz Majewski2012-11-151-2/+4
| | | | | | | | | | | | | | Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first. Test HW: - Exynos4210 - Trats - S5PC110 - goni Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* gpio: Replace ARM gpio.h with the common API in include/asm-genericJoe Hershberger2012-01-091-19/+28
| | | | | | | | | | | | | | | | ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and extended to the new mxs_gpio.c. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* i2c:gpio:s5p: I2C GPIO Software implementation (via soft_i2c)Łukasz Majewski2011-09-041-0/+44
| | | | | | | | | | | This patch adds support for software I2C for GONI and Universal C210 reference targets. It adds support for access to GPIOs by number, not as it is present, by bank and offset. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Heiko Schocher <hs@denx.de>
* gpio:samsung s5p_ suffix add for GPIO functionsŁukasz Majewski2011-09-031-10/+10
| | | | | | | | | | | | | | This change is driven by need of general gpio_* functions, which as their parameter are accepting the GPIO pin number, NOT block and pin. This makes the code alike to omap, and allows for using more generic frameworks (e.g. software I2C). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* s5pc1xx: gpio: bug fix at gpio_set_pull functionMinkyu Kang2010-06-141-1/+1
| | | | | | | When set to PULL_NONE, gpio_set_pull function is returned without write the register. This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SAMSUNG: make s5p common gpio functionsMinkyu Kang2010-04-301-0/+143
Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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