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* MPC85xx: remove support for TQM85xx boardsWolfgang Denk2012-10-051-214/+0
| | | | | | | | | | | | Due to grown code sizes the TQM85xx boards don't build any more with some older tool chains (like ELDK 4.2). As these boards have long reached EOL it seems a waste of effort trying to fix them. The vendor has agreed to drop support for them, too. So let's get rid of them. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
* mpc85xx boards: initdram() cleanup/bugfixBecky Bruce2011-01-141-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* tqm85xx: Update PCI codePeter Tyser2010-10-201-5/+5
| | | | | | | | Update to use the recent, common FSL PCI initialization code. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: sr@denx.de Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC85xx: TQM8548: use cache for AG and BE variantsWolfgang Grandegger2009-02-161-2/+2
| | | | | | | | | | | | This patch makes accesses to the system memory cachable by removing the caching-inhibited and guarded flags from the relevant TLB entries for the TQM8548_BE and TQM8548_AG modules. FYI, the Freescale MPC85* boards are configured similarly. This results in a big averall performace improvement. TFTP downloads, NAND Flash accesses, kernel boots, etc. are much faster. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* MPC85xx: TQM8548_AG: add 1 GiB DDR2-SDRAM configurationWolfgang Grandegger2009-02-161-3/+16
| | | | | | | | This patch add support for the 1 GiB DDR2-SDRAM on the TQM8548_AG module. Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-41/+41
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* TQM85xx: Change memory map to support Flash memory > 128 MiBWolfgang Grandegger2008-06-111-0/+97
| | | | | | | | | | | | | | | | | Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash memory. The current memory map only supports up to 128 MiB Flash. This patch adds the configuration option CONFIG_TQM_BIGFLASH. If set, up to 1 GiB flash is supported. To achieve this, the memory map has to be adjusted in great parts (for example the CCSRBAR is moved from 0xE0000000 to 0xA0000000). If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new memory map also has to be considered in the kernel (changed CCSRBAR address, changed PCI IO base address, ...). Please use an appropriate Flat Device Tree blob (tqm8548.dtb). Signed-off-by: Martin Krause <martin.krause@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* TQM85xx: NAND support via local bus UPMBWolfgang Grandegger2008-06-111-1/+1
| | | | | | | | | | | | | | | | | | | This patch adds support for NAND FLASH on the TQM8548. It is disabled by default and can be enabled for the TQM8548 modules. It is now based on the re-written FSL NAND UPM driver. A patch has been posted earlier today with the subject: "NAND FSL UPM: driver re-write using the hwcontrol callback" Note that the R/B pin is not supported by that module requiring to use the specified maximum delay time. Note: With NAND support enabled the size of the U-Boot image exceeds 256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk, doubling the image size :-(. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* TQM8548: PCI express supportWolfgang Grandegger2008-06-111-0/+30
| | | | | | | | | This patch adds support for PCI express cards. The board support now uses common FSL PCI init code, for both, PCI and PCIe on all TQM85xx modules. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* TQM85xx: Support for Intel 82527 compatible CAN controllerWolfgang Grandegger2008-06-101-0/+1
| | | | | | | | This patch adds initialization of the UPMC RAM to support up to two Intel 82527 compatible CAN controller on the TQM85xx modules. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* TQM85xx: Various coding style fixesWolfgang Grandegger2008-06-101-46/+52
| | | | Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
* TQM: move TQM boards to board/tqcWolfgang Grandegger2008-06-101-0/+114
Move all TQM board directories to the vendor specific directory "tqc" for modules from TQ-Components GmbH (http://www.tqc.de). Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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