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* Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale.Kumar Gala2007-12-111-547/+0
| | | | | | Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Stop using immap_t on 85xxKumar Gala2007-12-111-6/+3
| | | | | | | | In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_*_ADDR as the base of the registers instead of getting it via &immap. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update MPC85xx CDS to use libfdtKumar Gala2007-12-111-20/+19
| | | | | | | Updated the MPC85xx CDS config to use libfdt and assume use of aliases for ethernet, pci, and serial for the various fixups that are done. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Stop using immap_t for guts offset on 85xxKumar Gala2007-12-111-6/+4
| | | | | | | | In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers instead of getting it via &immap->im_gur. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ft_board_setup update 85xx/86xx of pci/pcie bus-range property.Ed Swarthout2007-09-041-1/+1
| | | | | | pcie is now differentiated from pci. Add 8641 bus-range updates. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* 8548cds fixesEd Swarthout2007-08-291-3/+11
| | | | | | | | | | Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the correct consoledev needed for linux boot. Standardize on fdt{file,addr} var to hold dtb file name. Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* 85xxCDS: Add make targets for legacy systems.Randy Vinson2007-08-141-6/+9
| | | | | | | | The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
* 8548cds PCIE support.Ed Swarthout2007-08-141-32/+205
| | | | | | | | | | | | | | | | | | | | Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-171-5/+5
| | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Cleaned up some 85xx PCI bugsAndy Fleming2007-05-021-3/+6
| | | | | | | | | | | * Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
* u-boot: Fix CPU2 errata on MPC8548CDS boardZang Roy-r619112007-04-231-0/+7
| | | | | | This patch apply workaround of CPU2 errata on MPC8548CDS board. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
* Fix compilation warnings on a few 85xx boards.Jon Loeliger2006-10-201-1/+1
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* * Fix a bunch of compiler warnings for gcc 4.0Jon Loeliger2006-10-191-2/+0
| | | | Signed-off-by: Matthew McClintock <msm@freescale.com>
* Add support for eTSEC 3 & 4 on 8548 CDSAndy Fleming2006-09-191-0/+32
| | | | | | | * Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS. This will only work on rev 1.3 boards (but doesn't break older boards) * Cleaned up some comments to reflect the expanded role of tsec in other systems
* * Added VIA configuration tableMatthew McClintock2006-08-091-16/+16
| | | | | | | * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
* * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-251-0/+329
Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
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