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* tools/kwboot: Add parameters to set delay and timeout via cmdlineStefan Roese2015-06-141-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | To support the Armada 38x, new values for the request-delay and the response-timeout are needed. As the values already implemented in this tool (for Kirkwood and Armada XP) don't seem to work here. To make this more flexible, lets add make those 2 parameters configurable via the cmdline. Here the new parameters: -q <req-delay>: use specific request-delay -s <resp-timeo>: use specific response-timeout For the Marvell DB-88F6820 these values are known to work: One board: -q 2 -s 1 2nd board: -q 5 -s 5 So this seems to be even board specific. But with this patch now those values can be specified and tested via the cmdline. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Luka Perkov <luka.perkov@sartura.hr>
* arm: mvebu: Update CBAR with SOC regs baseKevin Smith2015-06-141-0/+7
| | | | | | | | | SMP-enabled Linux kernels read the CBAR register in CP15 to find the address of the SCU registers. After remapping internal registers, also update the CBAR so the kernel can find them. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Disable L2 cache before enabling d-cacheStefan Roese2015-06-141-0/+8
| | | | | | | | L2 cache may still be enabled by the BootROM. We need to first disable it before enabling d-cache support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
* tools/kwbimage.c: Correct header size for SPI bootKevin Smith2015-06-141-10/+12
| | | | | | | | | | | | If defined, the macro CONFIG_SYS_SPI_U_BOOT_OFFS allows a board to specify the offset of the payload image into the kwb image file. This value was being used to locate the image, but was not used in the "header size" field of the main header. Move the use of this macro into the function that returns the header size so that the same value is used in all places. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Stefan Roese <sr@denx.de>
* Nokia RX-51: Fix calculating return address in save_boot_paramsPali Rohár2015-06-121-4/+0
| | | | | | | | | | | | Commit e11c6c279d823dc0d2f470c5c2e3c0a9854a640f broke calculating lr register in function save_boot_params() and caused U-Boot to crash at early boot time on Nokia N900 board. This patch fix calculating return address in lr register and make Nokia N900 board bootable again. Patch was tested in qemu and also on real N900 HW. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2015-06-1150-243/+309
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| * dm: usb: tegra: Drop legacy USB codeSimon Glass2015-06-104-159/+0
| | | | | | | | | | | | Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sandbox: Move CONFIG_SANDBOX_SERIAL to KconfigSimon Glass2015-06-105-3/+30
| | | | | | | | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Remove SPL undefine of CONFIG_OF_CONTROLSimon Glass2015-06-103-0/+6
| | | | | | | | | | | | | | Allow SPL to be built with this option so that we can support device tree control. Disable the simple bus for now in SPL. It may be needed later. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Add a simple version of memalign()Simon Glass2015-06-101-0/+14
| | | | | | | | | | | | This is used when the full malloc() is not available. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: serial: Don't support CONFIG_CONS_INDEX with device treeSimon Glass2015-06-101-32/+37
| | | | | | | | | | | | | | | | This feature should be deprecated for new boards, and significantly adds to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen node. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dts: Disable device tree for SPL on all boardsSimon Glass2015-06-1022-0/+33
| | | | | | | | | | | | | | We plan to enable device tree in SPL by default. Before doing this, explicitly disable it for all boards. Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: arm: Drop device tree paddingSimon Glass2015-06-101-1/+2
| | | | | | | | | | | | | | The 4KB padding doesn't seem necessary since we don't normally adjust the control device tree file within U-Boot. Also drop the memory table space. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver modelSimon Glass2015-06-102-1/+5
| | | | | | | | | | | | | | | | This option is used by some boards, so support it with driver model. This is really ugly - we should rewrite this driver once all users are moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * lcd: Support colour lookup table on 16bpp display in BMP imagesSimon Glass2015-06-101-3/+20
| | | | | | | | | | | | | | For 16-bit-per-pixel displays it is useful to support 8 bit-per-pixel images to reduce image size. Add support for this when drawing BMP images. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Remove typedefs from bmp_layout.hSimon Glass2015-06-106-31/+30
| | | | | | | | | | | | | | | | | | We try to avoid typedefs and these ones are easy enough to remove. Before changing this header in the next patch, remove the typedefs. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * sandbox: Add an implementation for cleanup_before_linux_select()Simon Glass2015-06-101-0/+5
| | | | | | | | | | | | Support this function so we can use Chrome OS verified boot with sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
| * arm: Allow cleanup_before_linux() without disabling cachesSimon Glass2015-06-102-18/+44
| | | | | | | | | | | | | | | | This function is used before jumping to U-Boot, but in that case we don't always want to disable caches. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
| * arm: spl: Add an API to detect when U-Boot is started from SPLSimon Glass2015-06-101-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For secure boot systems it is common to have a read-only U-Boot which starts the machine and jumps to a read-write U-Boot for actual booting the OS. This allows the read-write U-Boot to be upgraded without risk of permanently bricking the machine. In the event that the read-write U-Boot is corrupted, the read-only U-Boot can detect this with a checksum and boot into a recovery flow. To support this, add a way to detect when U-Boot is run from SPL as opposed to some other method, such as booted directly (no SPL) or started from another source (e.g. a primary U-Boot). This works by putting a special value in r0. For now we rely on board-specific code to actually check the register and set a flag. At some point this could be generalised, perhaps by using a spare register and passing a flag to _main and/or board_init_f(). This commit does not implement any feature, but merely provides the API for boards to implement. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: usb: Implement usb_detect_change() for driver modelSimon Glass2015-06-101-0/+43
| | | | | | | | | | | | Support this function with driver model also (CONFIG_DM_USB). Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: tegra: usb: Move USB to driver modelSimon Glass2015-06-102-0/+5
| | | | | | | | | | | | | | | | | | | | Somehow this change was dropped in the various merges. I noticed when I came to turn off the non-driver-model support for Tegra. We need to make this change (and deal with any problems) before going further. Change-Id: Ib9389a0d41008014eb0df0df98c27be65bc79ce6 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
| * dm: i2c: Add compatibility functions for dm_i2c_reg_read/write()Simon Glass2015-06-102-0/+27
| | | | | | | | | | | | | | | | Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* | common/cmd_bdinfo: show gd->board_typeHannes Schmelzer2015-06-111-0/+3
| | | | | | | | | | | | | | | | | | sometimes it is usefull to know if board-detection has written the correct value into gd->board_type. For this we add some output to the bdinfo command. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* | blackfin: fix undefined reference to srand and randMasahiro Yamada2015-06-1115-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9ba9e85f3f1c (net: Fix NET_RANDOM_ETHADDR dependencies) accidentally dropped CONFIG_LIB_RAND defines for 14 Blackfin boards. Prior to that commit, those boards defined CONFIG_LIB_RAND, but not CONFIG_NET_RANDOM_ETHADDR. So, commit 9ba9e85f3f1c should not have touched them, but in fact it ripped CONFIG_LIB_RAND off from all the header files, which caused undefined reference to srand and rand. CONFIG_LIB_RAND=y must be revived for such boards. BTW, this commit indeed makes it better, but even with this fix, three boards (bf533-stamp, bf538f-ezkit, cm-bf548) still can not build due to region 'ram' overflowed error. This was cause by commit 6eed3786c68c (net: Move the CMD_NET config to defconfigs) because CMD_NET selects NET, and NET selects REGEX. Eventually, some boards were newly enabled with CONFIG_REGEX, increasing the memory footprint. A patch is expected to fix the build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | README.scrapyard: add entries for dead AVR32 boardsMasahiro Yamada2015-06-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | Some AVR32 boards were dropped by the following commits: 9eb45aabe078 (avr32: delete non generic board favr-32-ezkit) e36930764471 (avr32: delete non generic board hammerhead) c62d2f8fc5c6 (avr32: delete non generic board mimc200) e5354b8a9e2a (avr32: delete non generic board's atstk100{3, 4, 6}) Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-samsungTom Rini2015-06-101-78/+2
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| * odroid: dts: cleanup of MAX77686 regulatorsPrzemyslaw Marczak2015-06-101-78/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit cleanup MAX77686 regulator node by: - remove the sub-nodes of unconnected regulators - remove the "regulator-compatible" properties of all regulators This prevents printing init errors for the regulators, with duplicated name strings. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-06-102-0/+2
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| * | sunxi: Enable CONFIG_SYS_64BIT_LBA when AHCI is usedBernhard Nortmann2015-06-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to absence of CONFIG_SYS_64BIT_LBA, u-boot-sunxi currently has no support for the (GPT) partioning scheme of large disks > 2TB. While the AHCI driver seems to handle this nicely, the problem is that lbaint_t values get truncated to 32-bit. This patch sets CONFIG_SYS_64BIT_LBA from sunxi_common.h for all SoCs that support AHCI (CONFIG_SUNXI_AHCI). Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Request macpwr gpio before using itHans de Goede2015-06-101-0/+1
| |/ | | | | | | | | | | | | | | This fixes ethernet no longer working on boards which use a gpio to enable the phy. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2015-06-1032-2025/+7
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| * | avr32: delete ancient board.cAndreas Bießmann2015-06-102-259/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: take maintainership for atstk1002Andreas Bießmann2015-06-101-2/+2
| | | | | | | | | | | | | | | | | | I have this board at work, so I can trun tests on it. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board's atstk100{3, 4, 6}Andreas Bießmann2015-06-1010-572/+1
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board mimc200Andreas Bießmann2015-06-107-407/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board hammerheadAndreas Bießmann2015-06-107-276/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | avr32: delete non generic board favr-32-ezkitAndreas Bießmann2015-06-108-509/+0
| | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | atngw100: convert to generic boardAndreas Bießmann2015-06-101-0/+4
| |/ | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | tegra: config: nyan-big: Add options required by Chrome OS bootSimon Glass2015-06-091-0/+5
| | | | | | | | | | | | | | | | | | | | We need to match the device tree in the FIT with the U-Boot model so we can automatically select the right device tree. Also adjust the load address so that the device tree is not in the way when a zImage kernel tries to extract itself. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Replace 'Norrin' with 'Nyan-big' and fix typoSimon Glass2015-06-092-2/+2
| | | | | | | | | | | | | | | | With the rename the MAINTAINER file was not updated. Fix it and the 'Chrombook' typo in Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: config: Allow Chrome OS environment settings to be includedSimon Glass2015-06-091-1/+6
| | | | | | | | | | | | | | Bring these in if they are provided by the board. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: nyan-big: Add additional clock and kernel initSimon Glass2015-06-091-0/+69
| | | | | | | | | | | | | | | | | | | | We need to turn on all audio-related clocks for the Chrome OS kernel to boot. Otherwise it will hang when trying to enable audio. Also for Linux set up graphics driver video protection. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Allow board-specific initSimon Glass2015-06-092-2/+13
| | | | | | | | | | | | | | Add a hook to allows boards to add their own init to board_init(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: lcd: Tidy up clock initSimon Glass2015-06-091-3/+1
| | | | | | | | | | | | | | Use the correct function for clock init. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Increase maximum arguments to 32Simon Glass2015-06-091-1/+1
| | | | | | | | | | | | | | | | When setting up large environment variables we can exceed 16 arguemnts. Increase this to avoid problems. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Add missing tegra124 peripheralsSimon Glass2015-06-092-7/+7
| | | | | | | | | | | | | | There are some missing entries in the tables. Add them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Introduce SRAM repair on tegra124Simon Glass2015-06-092-1/+31
| | | | | | | | | | | | | | | | This is required in order to avoid instability when running from caches after the kernel starts. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: clock: Adjust PLL access to avoid a warningSimon Glass2015-06-091-2/+5
| | | | | | | | | | | | | | | | A harmless but confusing warning is displayed when looking up the DisplayPort PLL. Correct this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: clock: Support enabling external clocksSimon Glass2015-06-092-0/+25
| | | | | | | | | | | | | | Add a simple function to enable external clocks. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: spi: Support slow SPI ratesSimon Glass2015-06-091-3/+15
| | | | | | | | | | | | | | | | | | Use the oscillator as the source clock when we cannot achieve a low-enough speed with the peripheral clock. This happens when we request 3MHz on a SPI clock, for example. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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