avr32: delete non generic board mimc200

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

7 files changed, 0 insertions, 407 deletions

diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index cfcdbe7565..0c7b1ba11a 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -29,15 +29,11 @@ config TARGET_ATSTK1006
 config TARGET_GRASSHOPPER
 	bool "Support grasshopper"
 
-config TARGET_MIMC200
-	bool "Support mimc200"
-
 endchoice
 
 source "board/atmel/atngw100/Kconfig"
 source "board/atmel/atngw100mkii/Kconfig"
 source "board/atmel/atstk1000/Kconfig"
 source "board/in-circuit/grasshopper/Kconfig"
-source "board/mimc/mimc200/Kconfig"
 
 endmenu
diff --git a/board/mimc/mimc200/Kconfig b/board/mimc/mimc200/Kconfig
deleted file mode 100644
index 18736d7f96..0000000000
--- a/board/mimc/mimc200/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_MIMC200
-
-config SYS_BOARD
-	default "mimc200"
-
-config SYS_VENDOR
-	default "mimc"
-
-config SYS_SOC
-	default "at32ap700x"
-
-config SYS_CONFIG_NAME
-	default "mimc200"
-
-endif
diff --git a/board/mimc/mimc200/MAINTAINERS b/board/mimc/mimc200/MAINTAINERS
deleted file mode 100644
index 6cb51dd3cb..0000000000
--- a/board/mimc/mimc200/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MIMC200 BOARD
-M:	Mark Jackson <mpfj@mimc.co.uk>
-S:	Maintained
-F:	board/mimc/mimc200/
-F:	include/configs/mimc200.h
-F:	configs/mimc200_defconfig
diff --git a/board/mimc/mimc200/Makefile b/board/mimc/mimc200/Makefile
deleted file mode 100644
index 5c30c0dbca..0000000000
--- a/board/mimc/mimc200/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Copyright (C) 2005-2006 Atmel Corporation
-#
-# SPDX-License-Identifier:	GPL-2.0+
-
-obj-y	:= mimc200.o
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
deleted file mode 100644
index f078295508..0000000000
--- a/board/mimc/mimc200/mimc200.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * Copyright (C) 2006 Atmel Corporation
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <netdev.h>
-
-#include <asm/io.h>
-#include <asm/sdram.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/hmatrix.h>
-#include <asm/arch/mmu.h>
-#include <asm/arch/portmux.h>
-#include <atmel_lcdc.h>
-#include <lcd.h>
-
-#include "../../../arch/avr32/cpu/hsmc3.h"
-
-struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
-	{
-		.virt_pgno	= CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
-		.nr_pages	= CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
-		.phys		= (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)
-					| MMU_VMR_CACHE_NONE,
-	}, {
-		.virt_pgno	= EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT,
-		.nr_pages	= EBI_SRAM_CS2_SIZE >> MMU_PAGE_SHIFT,
-		.phys		= (EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT)
-					| MMU_VMR_CACHE_NONE,
-	}, {
-		.virt_pgno	= CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
-		.nr_pages	= EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
-		.phys		= (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)
-					| MMU_VMR_CACHE_WRBACK,
-	},
-};
-
-#if defined(CONFIG_LCD)
-/* 480x272x16 @ 72 Hz */
-vidinfo_t panel_info = {
-	.vl_col			= 480,		/* Number of columns */
-	.vl_row			= 272,		/* Number of rows */
-	.vl_clk			= 5000000,	/* pixel clock in ps */
-	.vl_sync		= ATMEL_LCDC_INVCLK_INVERTED |
-				  ATMEL_LCDC_INVLINE_INVERTED |
-				  ATMEL_LCDC_INVFRAME_INVERTED,
-	.vl_bpix		= LCD_COLOR16,	/* Bits per pixel, BPP = 2^n */
-	.vl_tft			= 1,		/* 0 = passive, 1 = TFT */
-	.vl_hsync_len		= 42,		/* Length of horizontal sync */
-	.vl_left_margin		= 1,		/* Time from sync to picture */
-	.vl_right_margin	= 1,		/* Time from picture to sync */
-	.vl_vsync_len		= 1,		/* Length of vertical sync */
-	.vl_upper_margin	= 12,		/* Time from sync to picture */
-	.vl_lower_margin	= 1,		/* Time from picture to sync */
-	.mmio			= LCDC_BASE,	/* Memory mapped registers */
-};
-
-void lcd_enable(void)
-{
-}
-
-void lcd_disable(void)
-{
-}
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static const struct sdram_config sdram_config = {
-	.data_bits	= SDRAM_DATA_16BIT,
-	.row_bits	= 13,
-	.col_bits	= 9,
-	.bank_bits	= 2,
-	.cas		= 3,
-	.twr		= 2,
-	.trc		= 6,
-	.trp		= 2,
-	.trcd		= 2,
-	.tras		= 6,
-	.txsr		= 6,
-	/* 15.6 us */
-	.refresh_period	= (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
-};
-
-int board_early_init_f(void)
-{
-	/* Enable SDRAM in the EBI mux */
-	hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
-
-	/* Enable 26 address bits and NCS2 */
-	portmux_enable_ebi(16, 26, PORTMUX_EBI_CS(2), PORTMUX_DRIVE_HIGH);
-	sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
-
-	portmux_enable_usart1(PORTMUX_DRIVE_MIN);
-
-	/* de-assert "force sys reset" pin */
-	portmux_select_gpio(PORTMUX_PORT_D, 1 << 15,
-			PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
-
-	/* init custom i/o */
-	/* cpu type inputs */
-	portmux_select_gpio(PORTMUX_PORT_E, (1 << 19) | (1 << 20) | (1 << 23),
-			PORTMUX_DIR_INPUT);
-	/* main board type inputs */
-	portmux_select_gpio(PORTMUX_PORT_B, (1 << 19) | (1 << 29),
-			PORTMUX_DIR_INPUT);
-	/* DEBUG input (use weak pullup) */
-	portmux_select_gpio(PORTMUX_PORT_E, 1 << 21,
-			PORTMUX_DIR_INPUT | PORTMUX_PULL_UP);
-
-	/* are we suppressing the console ? */
-	if (gpio_get_value(GPIO_PIN_PE(21)) == 1)
-		gd->flags |= (GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE);
-
-	/* reset phys */
-	portmux_select_gpio(PORTMUX_PORT_E, 1 << 24, PORTMUX_DIR_INPUT);
-	portmux_select_gpio(PORTMUX_PORT_C, 1 << 18,
-			PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
-
-	udelay(5000);
-
-	/* release phys reset */
-	gpio_set_value(GPIO_PIN_PC(18), 0);	/* PHY RESET (Release)	*/
-
-	/* setup Data Flash chip select (NCS2) */
-	hsmc3_writel(MODE2, 0x20121003);
-	hsmc3_writel(CYCLE2, 0x000a0009);
-	hsmc3_writel(PULSE2, 0x0a060806);
-	hsmc3_writel(SETUP2, 0x00030102);
-
-	/* setup FRAM chip select (NCS3) */
-	hsmc3_writel(MODE3, 0x10120001);
-	hsmc3_writel(CYCLE3, 0x001e001d);
-	hsmc3_writel(PULSE3, 0x08040704);
-	hsmc3_writel(SETUP3, 0x02050204);
-
-#if defined(CONFIG_MACB)
-	/* init macb0 pins */
-	portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
-	portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
-#endif
-
-#if defined(CONFIG_MMC)
-	portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
-#endif
-
-#if defined(CONFIG_LCD)
-	portmux_enable_lcdc(1);
-#endif
-
-	return 0;
-}
-
-int board_early_init_r(void)
-{
-	gd->bd->bi_phy_id[0] = 0x01;
-	gd->bd->bi_phy_id[1] = 0x03;
-	return 0;
-}
-
-int board_postclk_init(void)
-{
-	/* Use GCLK0 as 10MHz output */
-	gclk_enable_output(0, PORTMUX_DRIVE_LOW);
-	gclk_set_rate(0, GCLK_PARENT_OSC0, 10000000);
-	return 0;
-}
-
-/* SPI chip select control */
-#ifdef CONFIG_ATMEL_SPI
-#include <spi.h>
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
-	return (bus == 0) && (cs == 0);
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-}
-#endif /* CONFIG_ATMEL_SPI */
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bi)
-{
-	macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
-	macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
-
-	return 0;
-}
-#endif
diff --git a/configs/mimc200_defconfig b/configs/mimc200_defconfig
deleted file mode 100644
index 85c646ec16..0000000000
--- a/configs/mimc200_defconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-CONFIG_AVR32=y
-CONFIG_TARGET_MIMC200=y
-CONFIG_CMD_NET=y
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
deleted file mode 100644
index e8e5ae73ec..0000000000
--- a/include/configs/mimc200.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Copyright (C) 2006 Atmel Corporation
- *
- * Configuration settings for the AVR32 Network Gateway
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/hardware.h>
-
-#define CONFIG_AT32AP
-#define CONFIG_AT32AP7000
-#define CONFIG_MIMC200
-
-#define CONFIG_MIMC200_EXT_FLASH
-
-/*
- * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
- * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
- * and the PBA bus to run at 1/4 the PLL frequency.
- */
-#define CONFIG_PLL
-#define CONFIG_SYS_POWER_MANAGER
-#define CONFIG_SYS_OSC0_HZ			10000000
-#define CONFIG_SYS_PLL0_DIV			1
-#define CONFIG_SYS_PLL0_MUL			15
-#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	16
-#define CONFIG_SYS_CLKDIV_CPU			0
-#define CONFIG_SYS_CLKDIV_HSB			1
-#define CONFIG_SYS_CLKDIV_PBA			2
-#define CONFIG_SYS_CLKDIV_PBB			1
-
-/* Reserve VM regions for SDRAM, NOR flash and FRAM */
-#define CONFIG_SYS_NR_VM_REGIONS		3
-
-/*
- * The PLLOPT register controls the PLL like this:
- *   icp = PLLOPT<2>
- *   ivco = PLLOPT<1:0>
- *
- * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
- */
-#define CONFIG_SYS_PLL0_OPT			0x04
-
-#define CONFIG_USART_BASE			ATMEL_BASE_USART1
-#define CONFIG_USART_ID				1
-
-#define CONFIG_MIMC200_DBGLINK		1
-
-/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION
-
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-#define CONFIG_STACKSIZE		(2048)
-
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_BOOTARGS							\
-	"root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1"
-#define CONFIG_BOOTCOMMAND						\
-	"fsload boot/uImage; bootm"
-
-#define CONFIG_SILENT_CONSOLE       /* enable silent startup */
-#define CONFIG_DISABLE_CONSOLE      /* disable console */
-#define CONFIG_SYS_DEVICE_NULLDEV   /* include nulldev device */
-
-#define CONFIG_LCD			1
-
-/*
- * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
- * data on the serial line may interrupt the boot sequence.
- */
-#define CONFIG_BOOTDELAY		0
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_AUTOBOOT
-
-/*
- * After booting the board for the first time, new ethernet addresses
- * should be generated and assigned to the environment variables
- * "ethaddr" and "eth1addr". This is normally done during production.
- */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE
-
-/*
- * BOOTP/DHCP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_MMC
-
-#define CONFIG_ATMEL_USART
-#define CONFIG_MACB
-#define CONFIG_PORTMUX_PIO
-#define CONFIG_SYS_NR_PIOS			5
-#define CONFIG_SYS_HSDRAMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_ATMEL_MCI
-#define CONFIG_GENERIC_MMC
-
-#if defined(CONFIG_LCD)
-#define CONFIG_CMD_BMP
-#define CONFIG_ATMEL_LCD		1
-#define LCD_BPP				LCD_COLOR16
-#define CONFIG_BMP_16BPP		1
-#define CONFIG_FB_ADDR			0x10600000
-#define CONFIG_WHITE_ON_BLACK		1
-#define CONFIG_VIDEO_BMP_GZIP 		1
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE		262144
-#define CONFIG_ATMEL_LCD_BGR555		1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
-#define CONFIG_SPLASH_SCREEN		1
-#endif
-
-#define CONFIG_SYS_DCACHE_LINESZ		32
-#define CONFIG_SYS_ICACHE_LINESZ		32
-
-#define CONFIG_NR_DRAM_BANKS		1
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-
-#define CONFIG_SYS_FLASH_BASE			0x00000000
-#define CONFIG_SYS_FLASH_SIZE			0x800000
-#define CONFIG_SYS_MAX_FLASH_BANKS		1
-#define CONFIG_SYS_MAX_FLASH_SECT		135
-
-#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_TEXT_BASE		0x00000000
-
-#define CONFIG_SYS_INTRAM_BASE			INTERNAL_SRAM_BASE
-#define CONFIG_SYS_INTRAM_SIZE			INTERNAL_SRAM_SIZE
-#define CONFIG_SYS_SDRAM_BASE			EBI_SDRAM_BASE
-
-#define CONFIG_SYS_FRAM_BASE			0x08000000
-#define CONFIG_SYS_FRAM_SIZE			0x20000
-
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_SIZE			65536
-#define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
-
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
-
-#define CONFIG_SYS_MALLOC_LEN			(1024*1024)
-
-/* Allow 4MB for the kernel run-time image */
-#define CONFIG_SYS_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)
-#define CONFIG_SYS_BOOTPARAMS_LEN		(16 * 1024)
-
-/* Other configuration settings that shouldn't have to change all that often */
-#define CONFIG_SYS_PROMPT			"U-Boot> "
-#define CONFIG_SYS_CBSIZE			256
-#define CONFIG_SYS_MAXARGS			16
-#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP
-
-#define CONFIG_SYS_MEMTEST_START		EBI_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END			(CONFIG_SYS_MEMTEST_START + 0x1f00000)
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
-
-#endif /* __CONFIG_H */