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-rw-r--r--common/image.c94
1 files changed, 94 insertions, 0 deletions
diff --git a/common/image.c b/common/image.c
index 26d6c9a592..0be09e5c63 100644
--- a/common/image.c
+++ b/common/image.c
@@ -32,6 +32,8 @@
#if IMAGE_ENABLE_FIT || IMAGE_ENABLE_OF_LIBFDT
#include <libfdt.h>
#include <fdt_support.h>
+#include <fpga.h>
+#include <xilinx.h>
#endif
#include <u-boot/md5.h>
@@ -159,6 +161,8 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_RKSD, "rksd", "Rockchip SD Boot Image" },
{ IH_TYPE_RKSPI, "rkspi", "Rockchip SPI Boot Image" },
{ IH_TYPE_ZYNQIMAGE, "zynqimage", "Xilinx Zynq Boot Image" },
+ { IH_TYPE_ZYNQMPIMAGE, "zynqmpimage", "Xilinx ZynqMP Boot Image" },
+ { IH_TYPE_FPGA, "fpga", "FPGA Image" },
{ -1, "", "", },
};
@@ -1210,6 +1214,96 @@ int boot_get_setup(bootm_headers_t *images, uint8_t arch,
}
#if IMAGE_ENABLE_FIT
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
+int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
+ uint8_t arch, const ulong *ld_start, ulong * const ld_len)
+{
+ ulong tmp_img_addr, img_data, img_len;
+ void *buf;
+ int conf_noffset;
+ int fit_img_result;
+ char *uname, *name;
+ int err;
+ int devnum = 0; /* TODO support multi fpga platforms */
+ const fpga_desc * const desc = fpga_get_desc(devnum);
+ xilinx_desc *desc_xilinx = desc->devdesc;
+
+ /* Check to see if the images struct has a FIT configuration */
+ if (!genimg_has_config(images)) {
+ debug("## FIT configuration was not specified\n");
+ return 0;
+ }
+
+ /*
+ * Obtain the os FIT header from the images struct
+ * copy from dataflash if needed
+ */
+ tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
+ tmp_img_addr = genimg_get_image(tmp_img_addr);
+ buf = map_sysmem(tmp_img_addr, 0);
+ /*
+ * Check image type. For FIT images get FIT node
+ * and attempt to locate a generic binary.
+ */
+ switch (genimg_get_format(buf)) {
+ case IMAGE_FORMAT_FIT:
+ conf_noffset = fit_conf_get_node(buf, images->fit_uname_cfg);
+
+ err = fdt_get_string_index(buf, conf_noffset, FIT_FPGA_PROP, 0,
+ (const char **)&uname);
+ if (err < 0) {
+ debug("## FPGA image is not specified\n");
+ return 0;
+ }
+ fit_img_result = fit_image_load(images,
+ tmp_img_addr,
+ (const char **)&uname,
+ &(images->fit_uname_cfg),
+ arch,
+ IH_TYPE_FPGA,
+ BOOTSTAGE_ID_FPGA_INIT,
+ FIT_LOAD_OPTIONAL_NON_ZERO,
+ &img_data, &img_len);
+
+ debug("FPGA image (%s) loaded to 0x%lx/size 0x%lx\n",
+ uname, img_data, img_len);
+
+ if (fit_img_result < 0) {
+ /* Something went wrong! */
+ return fit_img_result;
+ }
+
+ if (img_len >= desc_xilinx->size) {
+ name = "full";
+ err = fpga_loadbitstream(devnum, (char *)img_data,
+ img_len, BIT_FULL);
+ if (err)
+ err = fpga_load(devnum, (const void *)img_data,
+ img_len, BIT_FULL);
+ } else {
+ name = "partial";
+ err = fpga_loadbitstream(devnum, (char *)img_data,
+ img_len, BIT_PARTIAL);
+ if (err)
+ err = fpga_load(devnum, (const void *)img_data,
+ img_len, BIT_PARTIAL);
+ }
+
+ printf(" Programming %s bitstream... ", name);
+ if (err)
+ printf("failed\n");
+ else
+ printf("OK\n");
+ break;
+ default:
+ printf("The given image format is not supported (corrupt?)\n");
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, const ulong *ld_start, ulong * const ld_len)
{
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