diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/configs/lpd7a400-10.h | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | talos-obmc-uboot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz talos-obmc-uboot-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/lpd7a400-10.h')
| -rw-r--r-- | include/configs/lpd7a400-10.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h index 3722fd2933..6145c37f78 100644 --- a/include/configs/lpd7a400-10.h +++ b/include/configs/lpd7a400-10.h @@ -34,7 +34,7 @@ #define CONFIG_SYS_CLK_FREQ 14745600 /* System Clock PLL Input (Hz) */ /* ticks per second */ -#define CFG_HZ (508469) +#define CONFIG_SYS_HZ (508469) /*----------------------------------------------------------------------- * Stack sizes @@ -54,17 +54,17 @@ #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */ +#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */ /*----------------------------------------------------------------------- * FLASH and environment organization */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT (64) /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ /*---------------------------------------------------------------------- * Using SMC91C111 LAN chip |
