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| author | Stefan Roese <sr@denx.de> | 2008-07-09 17:33:57 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-07-10 09:14:01 +0200 |
| commit | 5d812b8b4ad9667c77a5bf92b4ba81699abc9fc3 (patch) | |
| tree | 08dd2c7f7496d9f160d14bb94ec3d2776b783051 /include/configs/katmai.h | |
| parent | cf1c2ed91df26903b956948f37f82de9e1158a89 (diff) | |
| download | talos-obmc-uboot-5d812b8b4ad9667c77a5bf92b4ba81699abc9fc3.tar.gz talos-obmc-uboot-5d812b8b4ad9667c77a5bf92b4ba81699abc9fc3.zip | |
ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
To support such configurations, we "only" map the first 2GB via the TLB's. We
need some free virtual address space for the remaining peripherals like, SoC
devices, FLASH etc.
Note that ECC is currently not supported on configurations with more than 2GB
SDRAM. This is because we only map the first 2GB on such systems, and therefore
the ECC parity byte of the remaining area can't be written.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/katmai.h')
| -rw-r--r-- | include/configs/katmai.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/configs/katmai.h b/include/configs/katmai.h index d3789bd67a..f07e470683 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -41,6 +41,13 @@ #define CFG_4xx_RESET_TYPE 0x2 /* use chip reset on this board */ /* + * Enable this board for more than 2GB of SDRAM + */ +#define CONFIG_PHYS_64BIT +#define CONFIG_VERY_BIG_RAM +#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) + +/* * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME katmai |
